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«Merit is concise: aid easy to rear I’ve purchased a of ot electronic becks from
various ait nors but 4eng “ierg never tails to amaze **e w th b s wo-k anc dedica; on.
10/13 I ecommend everyone ш pick up a copy, you will not regret it.
Sebastian G'scia
This s how it S'- DU-L be deneo
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cn circuit compcrents are especially help’s .
AV8-.

ОЗЦИЗИ15
9Ulffldl]3S
To my mother—a woman who. despite her lowly education,
taught me the value of integrity tnat shaped my character
and attitude. This book is dedicated to her for showing me
how to decipher the myriad of choices in life ano to discover
my true passion in the world of electronics.

Copyright © 2022 by Ng KengTiong. All -ights reserved.
Cover design oy the author.
Droducts and services mentioned in this cook are trademarks 01 registered trademarks of tneir
respective companies. All trademarks and registered trademarks are the property of their respective
holders.
No part of this nook may be reproduced in any form, or sto-ed in a database or retrieval system, or
transmitted or distributed in any form, by any means, electronic, mechanical photocopying, recording,
or otherwise, without the prior written permission of the authoi.
LIMIT OF LIABILITY AND DISCLAIMER OF WARRANTY
The information, examples, illustrations, documentation, and other references in this dook are
provioed "as is”, without warranty of any kind, expresses or implied, including witnout limitation any
warranty concerning the accuiacv, adequacy, or completeness of tne material or the results ooiarnea
from using the material. Neither the publisher nor the author shall be responsible toi any claims
attnbutable to errors, omissions, or other inaccuracies in the material in this cook. In no event shall
the publisher or author be liable for direct ndirect, special, incidental, or consequential damages in
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conta.ned heiein.
Print copy ISBN-13: 979-8-84-337954-4
PREFACE
That’s the way lite is—meaning is always there, but there is no clearly given
way ot decoding it. Conventional cinema obscures this with an easy reduction
ot meaning to plot and schematize characters.
Lenny Abrahamson
Sc,nematic diagrams are the olueprint of all electronic circuits, the medium through whicn
design and funct onalities are conveyed and understood.
A schematic diagram has two fundamental purposes:
• convey the intent of the haraware designer
 implement the designer's concept into physical reality
Deciphering schematic diag-ains, however, requires more than just a basic knowledge of the
pictorial syntax, whether it’s the component symools, reference designators, coded values
signal labels, wiring representation, etc. that are employed in their creation. You need to know
underlying principles that define the various circuit clusters which make up the overall design
to have a proper grasp cf their functional purposes as a whole.
hardware design has made tremendous progress in the last twenty years, spurred on by
advances in component and PCB manufacturing processes as well as the availab'Irty of more
sophisticated and integrated electronic design tools (EDA). What took months to plan and
design now requires only weeks to go from concept to realization—rhar.ks totne phenomenal
computing power" of modern worKstations and the vast accumulated arrays of proven circuit
templates that permit quick mix-and-match with minimum tweaks and mods to achieve the
desired results.
For the aspiring electronics enthusiast, there is certainly much to gain in learning tc read and
interpret schematic diagrams, notwithstanding the challenges and pitfalls along the way.
hopefully this book will help lessen the pains and make the journey a tat bit more interesting
and enjoyable
The Author
August 9, 2022
Deciphering Schematics
vii
TABLE OF CONTENTS
FU N DAMENTAL S
1	Intioduction	11
About This Book. Whdt's in a Name? Evolution ot Schematic Drafting.
Flavors of Schematic. Knowing Me, Knowing You
2	Basic Concepts	23
Symbols and Notations. Anatomy of a Schematic Diagram Grid References.
Title Block Component Symoology Wires, Buses and Junctions.
Module Pons. Sheet Symbols. Text and Labels. Layout and Organization.
Types of Circuits.
DIGITAL CIRCUITS
3	Elements of Digital Circuits	47
Combinational Logic Circuits. Tyoes of Combinational Circuits.
Sequential Logic Circuits Types of Sequential Circuits. Pull-Up and Dull-down
Resistors. Matching and Termination Resistors. DDR Memories (First Look).
Decoupling Capacitors. Power On Raset (PoR). Clock Geneiation Circuits.
De-Morgan s Theorem. Memory Devices. Programmaole Logic Devices.
Processors and Controllers Serial Buses. Summary.
4 Deciphering Digital Circuits	101
introduction Schematic Diagram Deciphering Steps Power and References.
Reser and Watchdog MCU and Memories Address Decoders. USART and
Serial Interfaces. Gyro Excitation Circuit. Digital Input/Output Ports.
Power Drive Ports. Deciphering a CPLD Circuit. ZL-9572 Experimental Board.
Further Studies.
ANA10G CIRCUITS
5 Elements cf Analng Circuits	125
Discrete vs Integrated. Passive vs Active Mechanical vs Solid-State.
vui
Passive Discieie. Active Discrete. Analog IDs. Sensors and Transducers.
Circuit Topologies Transistor Circuits MOSFET Circuits Opeiational Amplifiers.
Filter Circuits. Summary.
G Deciphering Analog Circuits	177
Intiuduct'on. Deciphering Steps. Schematic Diagram. Preliminary Data.
Marking Out References. Segregating Circuit Clusters. Identifying Topomgies
Gyroscope and Gimbals. Further Studies.
HYBRID CIRCUITS	 
7	Elements of Hybrid Circuits	205
ADCs and DACs. Sample and Hold Analog Switches. Analog Multiplexers.
Hybrid Microcircuits. A Case Study. Summary.
8	Deciphering Hybrid Circuits	213
Inti eduction. Schematic Diagram. Deciohei ing Steps. The Core Component.
Power Components. I CD Display Tactile Switches. Rotary Fncodeis.
Serial Interface. Analog In and Out Digital Inputs. Progiam & Debug Interface.
Miscellaneous Pans. Deciphering a CD Sound-Machine.
9	Bower Supply Circuits	249
Linear Power Supplies. Fixed Output. Variable Output. Deciphering Exercise.
Switched-Mooe Powei Supplies (SMFS). A Deciphering Example.
Low-Dropout (LDO| Regulators.
APPENDICES
A	Component Symbols	267
В	IEEE Standard Symbology	273
C	Active & Passive Filters	277
D	Op-Amp Configurations	281
E	Power Supply Topologies	285
Deciphering Sctiematics	ix
«HIS
Schematic Diagram
A drawing that illustrates by means of graphical symbols, the connectivity
and functionality of an electrical circuit without having to represent the
physical size, shape, or location of the circuit comocnents involved.
I InbuMon
The traveler sees what he sees The tourist sees what he has
corne to see.
G.K. Chesterton
There are many overlapping grey areas, depending or. the traveler or tourist in question, but
for the most part, tourists are generally concerned with seeing whereas travelers are primarily
interested in connecting. This difference in perspective is true also between a circuit designer
and someone who seeks to make sense of his work Travelers take their time to experience
the people and culture of a place m deptn, whereas teurists are satisfied with just a superficial
level of acqua ntance. Similarly, a hardware designer is thoroughly immersed into every aspect
of the circuit he is building, but the one who studies the end ptoduct may nave to be content
witnjust a basic understanding of its overall design putpose.
AboutThis Bock
I m not going to give readers the illusion that after poring through this book, they will attain
the level of expertise of a hardware designer. Nobody oecomes an expert oy casual study of
other people’s works. Besides formal education, real-life practical hands-on experience is
indispensable. So dispel away such notion to avoid disappointment later.1 That said, this book
will teach you several things:
	Recognize the elements of a schematic diagram
	Know the three standard representations (ANSI, IEC and DIN)
	Navigate between hierarchical and flat organizations
	Interpret the three major category of circuits:
°	Digital From simple logic gates, flip-flops to combinatorial and sequential
circuits, on to the moie complex CPU and MCU models.
°	Analog Addresses botn passive ano active aspects of anaiog designs.
°	Hybrid Covers converter circuits tADC/DAC) ano power supply types and
topologies
1 Of course, there are those who are self-taught in this discipline but these are exceptions rathei than the norm,
ano they succeed through sheer determination despite hard knocks, countless setbacks and failures in their
quest of mastery.
Deciphering Schematics
11
ChaptHi 1
What's in a Name?
You may have heard these terms—circuit diagram, electrical diagram and schematic diagram
used interchangeably in the course of your work or read aoout them in engineering journals
and periodicals. Are they referring to the same thing or are they markedly different from each
ether? To some, it’s just a matter ot opinion, but to the more stringent there is no ground for
ambiguity.
A circuit diagram is a graphical representation of an electrical circuit. Circuit diagrams are
widely used for circuit design, construction, and maintenance of electrical and electronic
equipment. They can oe divided into two categories—pictorial circuit diagram and schematic
circuit d agram:
Schematic Form
Pictorial diagrams are more easry understooc by beginners or the uninitiated in electronics,
but complex designs can make it tedious and impractical to draw and obscure the intent of
the circuits. Schematic d.agiams, on the other hand, represent the elements of a system with
abstract and graphic symbols instead of realistic pictures A schematic oiagram focuses more
on comprehenoing and spreading information rather than doing physical operations. For this
reason, schematic diagrams usually omit details that are not relevant to the information they
intend to convey and add simplified elements to help readers understand their features ano
relationships.2
2 Schematic diagrams are also used in many other fields, not just in electrical systems. For example the subway
map for passengers is a kind of schematic that represents subway stations and railway tracks with connecting
dots. Chemical processes can also be schematized with symbols of process control equipment.
12
FUNDAMENTALS
Introduction
That said, many electronics educational kits built their circuits on top of schematic outlines to
illustrate the correlation between physical components and their symbols, such as the push-
bull amolifier kit below:3
ARES-EI-M09 Electronics Kit
For electronics newbies, this is certainly a helpful educational piece to help visualize how a
circuit works Real-world printeo circuit boards (PCBs; and the schematic diagrams which they
are designed and produced are hardly anything like tnese kits. Imagine drawing the push pull
amplifiei above using pictor.al entities of the components instead of schematic symbols (see
overleaf)—it would reouire notjust massive amount of drafting papers but also artistic affinity
from the design engineer!
Depicting a circuit using lines and symbols is a more elegant ano efficient way to convey its
flow and functionality, as tne overleaf schematic diagram of the same push-pull amplifier
demonstrates Of course, this concept of circuit representation did notjust happen overnight;
it is an evolutionary process that is improved and refined overtime—as hardware and
software used to produce these drawings become better and smarter.
3 I picked up electronics during my secondary school days. The first project was an FM radio kit constructed out
of a wooden board with an overlaid schematic diagram. Nails were used as noaes on which components were
soldered to, either by their leads or extended with the help of s.ngle core wires.
Deciphering Schematics
13
Chapter 1
Pictorial form of a transistorized push-pull amplifier
Schematic diagram of a transistorized push-pull amplifier
14
FUNDAMENTALS
Introduction
Evolution of Schematic Drafting
Before the advent of tne computer age and with
it, the birth of electronic design automation
(EDA) tools, engineers drew their circuit designs
with pen and paper. It may not be a stretch to
imagine that some of the best concepts and
ideas were birthed on napkins ana the back of
envelops as sudden inspiration struck, or a
certain moment or words ignite tne imagination
of these geniuses and giants of bygone era.
Several names in the analog world responsible for shaping the linear IC industry with their
'deas, inventions and innovations naturally comes to mind:
These analog legenas and many past sages in otner fields of the electronic world would nave
formulated their concepts ana ideas into nand-arawn illustrations without the aid ol today s
computing platforms arid tools. In fact, there are those who still favor this age-old practice
over the modern marvels. ’ But for tnose who desired a neater way of creating their circuits,
the invention ot electronic symbols drawing stencils was a welcome rehef.* 5
* Cost may oe a prohibitive factor as the license of these EDA tools are not cheap. The more a’foraaole ones are
only suitable for amateurs and hobbyists use. The other consideration is the long learning curve. Of course, there
are a few free open-source versions, but most are awkward to use and runs on Linux. KiCAD. which runs on
Windows, looks promising but is not supported in the commercial sense, though there is a growing community
of users who are glad to provide limited help and advice, on a best effort basis.
5 I had a couple of these too. Surprisingly, these antique items are still available for sales on many online stores
such as Amazon and Alibaba —go figure!
Deciphering Schematics
15
Chapter 1
Electronic symbols drawing stencil
As schematic diagrams grew in complexity it became narderto draft ay hand, especially when
there’s a need tc modify or make corrections to the oaseline design.6 The earliest EDA tools
were produced for academic usage. 1981 markeo the beginning of EDA as an industry. Initially
big companies such as Hewlett Packard, Tektronix and Intel developed EDA too.s for internal
use, but as these tools become refined overtime, they saw the business potential and began
offering tneir software licenses for sale. Daisy Systems,7 Mentor Graphics and Vaud Logic
Systems were all founded around this time, but their products run mainly on high-end mini-
computer workstations and platforms.
Tne trend, however, has been set for computer-aided design automation. In 1985 OrCAD
Systems Corporation shipped its first product—Schematic Design Tool (SDT) that run on DOS
on a PC platform.8 This was followed by a digital simulator (Verification anc Simulation Tool,
cr VST'r and a PCB layout tool (PCS). OrCAD revolutionized the PCS industry landscape with its
low-cost PC-based EDA sof*ware and very soon, many startups began using it to design all
kinds of electronic products, from household electrical appliances to PC motherboards and
peripheral cards.9 The rest, as they say, is history.
6 Engineering change older (ECOi is a term used when .moiementing cnanges to afferent phases of a product,
whether aue to detect or to improve its functionality. It can be as simple as changing the value of a resistor, to
as complex as overhauling a substantia, portion of the hardware design.
7 I had the privilege of attending a three-day familiarization course by a local agent representing Daisy-Cadnetix's
flagship EDA software running from a Sun workstation in the early days of my employment with ST Electronics. It
wasn't the easiest piece of software to learn but it was quite some experience.
8 The SDT software, though primitive, was quite configurable in terms of the workspace and drivers. The library
is quite comprehensive covering a range of discrete and integrated components. It even came with a device
editor that allowed creation of new component symbols or modification to existing ones. The first version used a
text based editor but was replaced with a graphical one in later versions.
3 Believe it or not, there are still diehard users of DOS based OrCAD cools out there, despite tne availability of
modern Windows version today. To some, old wine certainly tastes better with age!
16
FUNDAMENTALS
introduction
OnCAD EDA Tools	TEMPLATE Design	Or-CAD ESP v4.40
OrCAO
Copynight 1990-1904 О-CAD, Inc.
ALL RIGHTS RESERVED.
Screen captures of OiCaD SDT in action under MS-DOS
Deciphering Schematics
17
ChaptHi 1
Schematic package sets price/perlormance standard for PC based СДГ
Creating a new price/performance
standard for PC-based CAD, Or-
CAD/SDT is a complete schematic
capture program selling for $495. The
package is developed to run on the
IBM PC and compatibles. Most pop-
ular graphics boards and printers are
supported. Menu-driven operation
simplifies placement of wires, text
and graphics symbols. Parts are
selected either by entering the part
name from the keyboard or by choos-
ing the part from a pop-up directory
where, once selected, it may be easily
moved or rotated for placement on
the worksheet.
For the repetitive tasks involved in
schematic capture, OrCAD/SDT
stores over 100 commands and exe-
cutes them with a single keystroke.
Commands can be tied together to re-
call more than one at a time.
Worksheets may be partitioned
into manageable parts and then hier-
archically organized for easy recall.
The system supports worksheets from
sizes A to E.
A component library with more
than 1200 parts offers all parts used
in industry. Devices from TTL and
CMOS families, microprocessors,
peripherals, memories and discrete
components as well as newly intro-
duced parts are included. A text
editor and Symbol Description Lan-
guage permit simple creation of new
symbols or custom libraries.
The OrCAD/SDT system also fea-
tures realtime rubberbanding of wires
and buses, multilevel intelligent
zoom, auto panning of worksheet at
screen boundary, siring searching
and on-line part browsing. The pack-
age provides utility programs for
schematic output, net listing of sig-
nal and part connections, design
checking for unconnected pins and
signal-line conflicts and a parts list
for the design.
Requirements for the system in-
clude an IBM PC or compatible,
MS-DOS 2.0 or greater, a DSDD
360-kbyte floppy disk drive and 256
kbytes of RAM
OrCAD Systems, 23315 W Baseline
Rd, Hillsboro, OR 97123. Circle 104
—J.H.M.
It pays to communicate
You can further your career
by writing technical articles
about the advanced work
you're doing. Also, we pay
an honorarium for ad
manuscripts that we
publish. For a free copy of
our Author’s Guide, circle
299 on the Reader Inquiry
Card
COMPUTER DESIGN;January 15, 1986	107
A blast from the past: OrCAD SDT advertisement (1986)
Altium Designer 2015: Modem EDA suite with powerful features.
18
FUNDAMENTALS
Introduction
Flavors of Schematic
Any ethnic grouo or culture has its own language or dialect that allows its people to interact
among themselves in an intelligible way and be unoerstood Similarly, schematic diagram
elements have their own representations so that design engineers can convey their circuit
ntent to their target audience—from engineers involved in product manufacturing process
to field service personnel doing after sales maintenance support.
Several standards were issued to provide guidelines for graphical symbols, abbreviations ano
device references wnich become the basis for reading and interpreting electrical drawings.
These standards include:
	American National Standards Institute (ANSI)
	Institute of Electrical and Electronics Engineers (IEEE)
	The International Electrotechnical Commission (IEC)
Now you would think that there should be some sort of standardization for tne ANSI or IEC
representation of components. Unfortunately, theie isn't. Symbols such as simple logic gates
come in a number ot variants let alone the myriads of discrete components. There are even
contentions as to wnether the number zero should have a slash to differentiate it from the
normal letter 'O', for that matter!
if you've read enough electronics books and magazines, worked on PCB design projects or
repaired m-house or th rd-oarty PCS products, you'd most likely have come across schematic
diagrams with different type of circuit representations, some of which nay even get you
scratching vour head just to make some sense out of tnem. Take a look at the eight basic
'ogic gates and their symbolic representations Oelow. and you’ll get an .dea what I am talking
about.
Deciphering Schematics
19
ChaptHi 1
For many of us, the first column representation is familiar like an old friend. This type of logic
symools is known as distinctive shapes and are commonly found in more traditional orsimpie
schematic diagrams. It has its origin in the 1950s and 60s from the US military under the M1L-
STD-806 specifications drafted to standardize all electronics drawing documents.10
The IEC style of representation, as seen from the miudle column, is rectangular in shape with
logic notations Ю desci ibe a Device s functionality. US engineers who've come across this style
found it ratner 'unfriendly' compared to the ANSI style, but it is widely adopted by many
European countries such as UK and Germany, the powerhouses of electronics innovation and
design. The reason is because tne IEC standard provides a consistent method of describing
complex logic functions for digital circuits than is possible using the ANSI standard.11
The last column is known as the DIN or Deutsches Institut fur Normung, which translates to
German Institute for Standardization. Wnile it is not as common as the ANSI or IEC, some
countries in Europe still use them.12
IEEE Std 315-1975	1993j
ANSI ¥32 2-1975 (R.aHwnred 19MJ
CSA 239-1975
i№m c*«E SU 3» «11
wet vat-urn
csaan-imi
IEEE Standard
American National Standard
Canadian Standard
Graphic Symbols for Electrical and
Electronics Diagrams
(Including Reference Designation Letters)
IEEE Suneardi Coortinseng Comirdnee 11 Graphic Symbols
Stcrconu for Aauncis Ntucoil Suadtrds Сотаияк ¥32
Amerkun Society ot Mechanfcil Engineer*
Institute of Electrical and Electronics Engineers
Approved Swiembw 4. 1975
RK>N™d0dob«20 1938
Reelfcmed December 2. 1993
IKE Standards Board
Approved October 31.1975
Rwalfinned January 16 1959
American National Standards Institute
Approved October 9 1979
Canadian Standards Association
Apptwed A<toi*<l lor Ua-ibMy UraOriober 31. IS75
ГС 80817 - Graphical Symbols for Durams
IntamaSonal
El««irot4*n*al
EC 50617 cere»» ртрмся я,п*ви Br me И леопг-емкл «wjrore
M*ie pots <£d г а 3)01 Ire prewxnly puttobed IEC 60617 bane been
raKparsedirtoniaxiiBasendainntvndudesscne irKisjeere
таи аажаи etnc виси scureacr EC 60517
*ubbsrip*om and Fnd-Uaer ReMrl ebons
pocfeael trou/l die ICC NaUaid Qxrsritlcs Hadond ComMbn-
Wpcrtrd 3d-s CXitets г* rSn-rVy lx m the I EC V*b 9tcre { srrciy vjwb
и tC кипу мамами»M>|K1 юаи амта utw
New пака data ам гмгсв ирашгг
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parrtxscutacaKn (5>яйа гиге Яепю*»е полез, keyucaes ronaU
twice** row IK *0*17 ertrerse
Hie rtnssrnfl тек -re awed to me database
. hern and ixfcrs and decern Obes
• Proaxsoi«rdarwa«<ioreiccincac»K4¥
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•	вгшухчлиаиж*»
Wmle Гт tempted to give equal treatment to the ANSI ana IEC standards, I'll have to limit
myself to just using the ANSI style rot all my exainpies m this book, for obvious reasons. But,
and if necessity arises, I will make mention of the latter for the benefit of my readers.13
10 It is a 'Made in America' thing which is why this style of drawing is also known as the ANSI/MIL standard.
11 Engineers who are comfortaole with mathematical symbol notations will appreciate tne eiegance of this style,
but those who don't will probably irk it.
12 They are such rare gems nowadays—but I had the honour of encountering some of these in my work!
13 For those interested in the IEC standard, there is a booklet by Texas Instruments which gives an overview of
the IEEE Standard 91-1984 of the same title. Just google to find and download it.
20
FUNDAMENTALS
Introduction
Knowing Me, Knowing You
Granted tnat a schematic diagram illustrates the
connectivity and functionality of a circuit without
navrng to represent the physical size, shape, or
location of the components involved, it does not
mean that we should overlook the latter. It is to
our advantage ana interest to oe aoie to
associate and correlate the component symbols
to their physical counterparts, though not
necessarily to the details or level a circuit
des.gner is expected to possess.14
For example, consider the 555 adjustable timer circuit oelow, with its schematic diagram and
stnpbcard layout diagrams shown side by side
Schematic diagram
Stripboard layout
The t mer circuit is oesigned to start timing when the switch is turned on. When the green LED
lights up. timing is in pi ogress. When the perioo. adjustaole using a IMohm potentiometer, is
over, the gieen LED turns off and the red LED .ights up with the beepei giving an audible
indication. If you refer to the 555 timer IC datasheet, you will know that it is configured for
monostaole operation.
Being able to correlate tne schematic symbols to their actual components not only gives you
a better appreciation of the circuit design, it enables you to troubleshoot circuit faults more
effectively.
14 I knew a hardware engineer in my previous company who giaduatec from MIT and specializes in embedded
systems. In the early days when he took public transport to work, i wou'd find him studying a thick stack of
document while waiting at the usual bus stop. I soon found out it was the MT8980 optical network digital
exchange switching matrix which he used in tandem with the M1894T and M18986 on a PCB of the company's
next generation communications system he’s designing. As it turned out, I was the test engineer assigned to
develop the ICT test program for this DCB!
Deciphering Schematics
21
ChaptHi 1
Possibilities of the above timer circuit malfunctioning can include:
	Wrong orientation of the 555 timer IC
•	Reverse polarity of the battery snap. LEDs or electrolytic capacitor
	Switch position mix-up (NC instead of NO)
•	Directional turn of the potentiometer (cw instead of CCW to increase period)
Even for a simple circuit like the adjustable timer, there are already four fault scenarios to
account for, not to mention other errors like wrong resistor values arising from color code
misinterpretation and component defects such as a bad iC or a leaky capacitor. Of course, if
you re solely learning to read schematic diagrams without having to handle any physical
electronic parts, tnen you need not concern yourself with this requirement. But as the saying
goes—nothing nappens in a vacuum and I seriously doubt anyone would take tne trouble to
learn how to decipher schematic diag-ams jus! for curiosity s sake...
22
FUNDAMENTALS
9. ta СолсшрЬз
Whethei you are an avid reader or just a casual browser, you a prooaoly have come across
nooks that are interesting and engaging, as well as tnose that turns you oft by their poor choice
of vocabulary ana style of writing The same can be saia of schematic diagrams. Some are
easy to make out ano understand while others are cryotic and confusing. If we might use an
ana ogy—electronic symbols are 'words7 and schematic diagrams are ‘novels’ to an electrical
or electronic engineer. To be able to read a schematic diagram you need a good g'asp of its
vocabulary and understand the grammatical flow of its language.15 16
A wed-drawn and properly laid out schematic d.agram is easy ana enjoyable to read. But not
every drafter adheres to the guidelines that defined what a good scnematic diagram should
be.1G Of course, you can still read a badly written novei with poor grammatical style—albeit
witn annoyance ana a measure of chagrin. Similarly, a poorly drawn schematic diagram will
requre more effort to decipher the meaning of its design intent.
15 My interest in linguistics has led me to study several languages—Japanese, Thai, GrecK and Hebrew, spoxen
ana written. They all have their charms and challenges but the most difficult language to learn as far as I'm
concerned has to be Thai. Japanese has similarities in its Kanji characters with Chinese, my mothei tongue
Greek has alphabets that engineers are familiar with. Hebrew is easy to learn (though not master) once you
understand its word and grammatical structure. Thai is like Sanskrit, and its countless consonant and vowel
tonal variations only adds to the level of difficulty.
16 The Art of PC’B Reverse Engineering has a section that describe good practices associated w.th producing
schematic diagrams that are readable and consistent in style.
Deciphering Schematics
23
ChaptHi 2
Readability and consistency ot style toi schematic diagrams can be observed by asking the
following questions;
	Is all the information cramped into a single page or spread out evenly across seveial
pages where signal flow can be easily followed?
	For multiple-page schematic, is it kept architecturally flat lor lesser than five sheets, or
o'ganized hierarchically (top-down) if it spanned more tnan five?
	Are critical components Нке aecoupl ng capacitors placed near their respective iCs or
all lumped together in a common area ano connected to tne supply rail?
	Is it ciean or messy with wire stubs and node names for virtual connections, or easy to
follow with direct point to point connectivity?
	Are descriptive net names used to aid in communicating and documenting design
debugging efforts?
	Are net name locators included for on-sheet ana off-sheet connections, or Is it left to
the reader to navigate the schematic on tneir own?
	Ate multiple ground types properly iepresentea and clearly indicated7
Tnese are some major considerations when determining if a schematic diagram snows clarity
cr confusion in its depiction. Lest you become discouraged by ail the idiosyncratic ranticgs.
let me assure you that oecipnenng a schematic diagram often becomes easier with practice
and experience. But first, you need to get your basics right from the start—and this is the
place to lay your first orick.
Symbols and Notations
Short forms and symools, both English and Greek, are used m engmeer.ngto denote electrical
quantities and units of measurement. They are attached to component symbols on scnematic
diagrams to facilitate ease of remembering rhe value ot quantities and constants, as the
tables below illustrate:
Electrical Quant.ties and Symbols
Physical Quantity	Symbol	Unit	Symbol
Voltage	V	Volt	V
Current	I	Ampere	A
Power	P	Watt	W
Resistance	R	Ohm	Q
Capacitance	C	Farad	F
Inductance	L	Henry	H
Frequency	f	Hertz	Hz
24
FUNDAMENTALS
Basic Concepts
Units of Measurement
Name	Symbol	Value
Pet a	P	10’5
Tera	T	1012
Giga	G	10’
Mega	M	10°
Kilo	К	10’
mill 1	m	10-3
micro	p	10-6
nano	n	10’
pico	p	10-’2
femto	f	10-15
These notations whicn accompany component symbols on a schematic diagram comprise two
carts—a reference designator or component ID. and either a value or part number depending
on the nature of the component symbol. For exampie, discrete components such as resisters,
capacitors and inductors usually have values attached to their reference designators:17
R 7 7
•—'ХЛЛ/—•
47KQ
Cl 15
100nF
L28
33mH
Diodes, transistors and integrated circuits, on the other hand, have part numbers assigned
next to their component ID:
Ж 316
IN4148
	U8	14 -4. 13 * 12 Г
3 	 „ 4 -	A	Qa В	QB Г	AC	
.._6_	D	QD	11
2		
		
1		1 R
		
	RCO	
7		
		
10		
		
9	—	
		
		
74LS163
17 Some resistors and capacitors have extia tolerance values included as a percentage figure.
Deciphering Schematics
25
ChaptHi 2
A reference designator is made up of a prefix and a number. The prefix indicates what kind of
component a symbol is representing. The following table shows common prefixes used in
schematic diagrams, thougn there may be slight variations depending on the drafter or even
company practices;
Components and Their Prefixes
Components	Prefixes	Components	Prefixes
Battery	В ВТ	Integrated Circuit	U.IC
Capacitor	С	Jumper, Link	J, TP
Capacitor (decoupling;	си	Potentiometer	RV
Connector (Таек)	CN, J	Power Supply	PS
Connector (Plug)	CN,P	Relay	K,RL
Crystal Oscillator	X,Y	Resistor	R
Delay Line	DL	Resistor Network	RN
Diode	D.CR	Switch	S,SW
Display, LED	DS	Test Point	TP
Filter	FL	T ransformer	T,TR
Fuse	F	Transistor MOSFET	Q т
Hybrid Device	HY	Zener Diode	Z.VR
Inductor	L		
Notice that some components share similar prefixes, such as the transformer ano transistor,
so it is impo'larit to identify them correctly based on their symbols. Also, tne^e are different
ways of denoting values when it comes to discrete devices For example, a resistor can show
either 47500 or 47K5 ohms, and a capacitor as 0.1 uF or 10OnF. Moreover, components may
not display their fun commercial part numbers but just their generic codes, especially in the
case of common TTL ano CMOS ICs. For example a MIL-SPEC 740O quad iwo-mput NANO gates
nas the military part number JM38510/001 04BCa but putting that in the schematic aiagram is
awkward cryptic and can even mess up its reaoabilty, so most circuit designers will simply
denote it as a 5400.18
U2D
5400
18 54xx indicates a military specification, usually of a ceramic packaging. 74xx is for commercial and plastic.
26
FUNDAMENTALS
Basic Concepts
Anatomy ol a Schematic Diagram
Depending on the complexity, a schematic diagram can be standard A4 size oi as large as
AO.19 The chart below gives you a perspective of the scales:
Except for simple circuits which can fit into a single sheet, most schematic diagrams are
usually broken up into clusters of related components by tneir functions ana span multiple
sheets or pages. Those with five pages or less are likely to be flat oi single level, while those
with more than five are usually organized in a multi level hierarchical form.
Looking at the sample page oveneaf. we see that a schematic diagram comprises several
basic elements:
	Grid references. P'oviae X-Y coordinates in alphanumerical formatter locating various
objects (components, signals, etc.)
	Title block. Provides informat.on aoout the schemauc diagram (project name, part
number rev sion. sheet number, date of drawing, etc )
	Component symbols. Symbolic repiesentauon oi a component or part of it.
	Wires. Simple end-to-end connection between two points. Tnese can pe straight, single
or multi-angled lines.
	Buses. A collection of wire groups (address, data, control, etc.)
	Junctions. Indicate connect vity between two or more wires.
	Text labels. Either attached to component symbols (reference designators, values, part
numbets, etc.) or standalone.
19 I’ve worked with schematic diagrams of various sizes in my 30 odd years of engineering career, including
tnose larger than-size AO prints from Elbit Systems.
Deciphering Schematics
27
FUNDAMENTALS
Horizontal grid reference
Vertical grid reference
Title block
Elements of a Schematic Diagram
Basic Concepts
Grid References
Most product schematic diagrams usually come with a pair of horizontal and vertical alpha-
numerical characters surrounding each sheet of circuit diagram. Depending on the size of the
drawing, the vertical grid can have belween 4-8 alphabets or numbers while the horizontal
gna normally retains eight numerals or letters, at most.
These grid zones, defined by tne dotted rectangles, provide X-Y coordinates for easily locating
objects (symbols, signals, etc.) that fall within the confines of these areas. This is especially
useful for scnematic diagrams that span multiple sheets or pages, where connecting signals
or buses may jump between pages, as illustrated below:
1	U6 A0	07 Al	06 A2	05 04 El	03 E3	02 01 E2	00 54HC138	7 о t Л 1 ЧИ1 Л7
2		\ H ) ОП1	Н/ 	I D	CLJQ	M
3		_	t □ DnO U1 10 i Pi CUP
4		1X- '0 SH2-B4 12 r c' cuo DR
6		13 	(г e |_i I rn
5		’ Г onl tZ 14 ±|	iG SH1-E2 Лм'1 <sUQ FA
F”		
(P/G SHEET 1)
Deciphering Schematics
2a
Chapter 2
U6 (54HC138) may be located in a separate sheet trom U17E (54НСЭ8) even though two of its
output p.ns, 13 and 14. are connected to the NAND gate’s inputs. Instead of signal names, text
bubbles are useo—in this case F and G to indicate the connections. The output pins from U6
are labelled with directive texts to help the reader navigate to the pages that bubbles A- H are
locateo, using a SHEET-ZONE short form notation.
Sometimes, schematic diagrams may include .ndex references to components and signal or
net names on the last few sheets.20
Title: Design: Date	Cref Part Report 0<l hov 30 11 00 17 200E		Title: Design, Date:	Basenet Report 00 Nov 30 11 00.17 2006
С1 [2 1A]	R35 [S.2F]		Base S1gna1	Loca11 on ([Zone)(d i г])
C2 [7 5E]	R36 [5 2F]		rBCDQSO	3 3E<> 5 4B 5 4F<>
C3 [2 ЗА]	R37 [13 2F]		FBCDCSO’	3 4E<> 5 4B 5 4F<>
C4 [11.3F]	038 [9 4B]		FBCDCS1	3 4E<> 5 4C 5.4F«
C5 |10.20]	439 14 2E]		FBCKS1 •	3 4£<> 5 4C 5 4F<>
C6 [7 £C]	R40 [4 3E)		FECDOS2	3 4E<> 5.40 5.4F<>
C7 [10 28]	R41 [14 3F]		FBCOClS?'	3 4E-> 5 40 5 4F«
C8 [6 4F]	R42 [14 3F]		FBCOOS3	3.4E<> 5.40 5.4F<>
C9 [0 2BJ	Я43 [14 3B]		CBCDCS3*	3 4E<> £ 40 5 4F<>
C10 [14 4C] 		P44 [13 2B] \ 			FBCDCS4 	/	3.4E<> 5 4F<> 5 5B 	
Consider the Cref Part Report above. Component Cl can be located on sheet 2 zone 1A [2.1 A]
and resistor R42 on sheet 14 zone 3F [14.3F].
Similaily. for the Basenet Report: Signal FBCDQSO has three instances—on sheet 3 zone 3E
[3.3E] and sheet 5 zones 4B [5 4B] and 4F [5.4F] Also it is a bidirectional s.gnal (<>) and part
of a data ous.
Further Note:
The order in wh'Ch the alphanumeric characters run on the grio references can be from
bottom right as shown in the previous illustration, oi in otner cases from the top left.
There is no neee to be too uptight about it, smce countries can nave different systems
too. such as left- and right-hand dr ves, and even switches which flip either up or down
to turn 'ON'
20 This practice is not mandatory and circuit designers are not obligeo to include these index references, except
fortheir own convenience and only it company policy dictates it.
30
FUNDAMENTALS
Basic Concepts
Title Block
The title block, usually located at the bottom rignt corner of a schematic oiagram, contains all
the information necessary to identify the drawing and to verify its authenticity. A detaileu title
Ыоск is divided into several fields as shown below:21
				
				
				
				
				
0	2015-01-06	ORIGINAL		RANDY DM
REV	DATE	AMENDMENTS		APPROVED
DRAWING TITLE: TRACKING RADAR INTERFACE BOARD				
CUSTOMER: INTELLi-SYSTEMS		Kinetec Corp. a company of Associated Engineers in Electronics		
DRAWN BY. NG KENG TIONG REVIEW BY: RANDY DYKEMAN		JOB NO: 2014-12-0386 DRAWING NO: LD123456-050	SUB-J/NO: 0386-001 REV: SHEET: 0	1 OF 2	
Information includes the drawing title (project name), drawing number and revision, sheet
reference numbei, comoany logo job number, customer name, drafter ano reviewer names,
and revision histoiy. Some title blocks may include additional information, such as drawing
scale ano copyright notice, document numbeis tnat are cross-refeienced, etc.
In a multi-sheet schematic diagram, usually the first or header sheet will contain a full title
Ь1оск while the res1 oi the pages will display a simplified version with only the essentials and
in particular, the sheet refe'ence numbers.
DRAWING TITLE: TRACKING RADAR INTERFACE BOARD			
DRAWN BY: NG KENG TIONG	JOB NO: 2014-12-0386	SUB-J/NO: 0386-001	
REVIEW BY: RANDY DYKEMAN	DRAWING NO: LD123456-050	REV: 0	SHEET: 2 OF 2
Should the number of minor revisions or ECOs (engineering change orders) accumulates over
time and warrants a major revision, an updated version of the schematic diagram will be
drafted with a new revision number appended to the title Ьюск.
21 In The Art of PCB Reverse Engineering, i demonstrated how to create a ‘smart’ title brock using Visio's multi-
field shape in the Advanced Topic chapter.
Deciphering Schematics
31
Chapter 2
Component Symbology
Schematic diagrams do not snow placement or scale of the actual physical components in a
circuit; instead, symbols are used to depict their function and flow in how they are connected
to each other. While it is not necessary to know how the components look like in Older to read
a schematic diagram, being aole to relate a symbol to its physical oart does provide an ecge
in deciphering and understanding how a circuit works.
Thankfully, you aon t need a complete collection of components to go that If the schematic
diagiam comes with a bill of materials (BON; or the part numbers can be obta.ned right off the
circuit d-awing itself, you're in luck! Just go to snaoeca.com and key in the part number (e.g..
LM358N) or description (e.g.. 8-pin DIP. SMD resistor, etc.) and the component illustration,
schematic symbol and even layout footprint will appear in an instant:
•uyoHTUom
iDUtfd JOtWd sanUaixn Modes 1 guycnTlcorn
4>*tk**s
V 1К5ТЖШГNTS
CwW я<ГГ И О
LM358N/NOPB
2 Orynel IWHt iwtfusttf HTTbrrl
22V 0Г <rrp	О ТВ 70
T|!W П>₽-*
СЛО >*|ЦЯ.*к FWntpnK JP Mort
0
бЯФЙМД
Symbol П
Footprint О
SnapEDA- - Component information in a snap!
Tne first thing in deciphering schematic diagram is tne ability to identify the various symnols
and elements that populate its pages. Take a look at the sample of common component
symnols overleaf. If you are a seasoned engineer, you should have no problem with most of
them. In fact. many of these symbols ate covered in academic textbooks for those studying
electronics. Even though there may be subtle differences between components of the same
categories, it is not too difficult to differentiate them once you understand the logic employed
in their creation.
Appendix A provides a comprehensive (thougn not complete) list of component symbols by
their categories and functions. These symbols are also generic at best.
32
FUNDAMENTALS
Basic Concepts
AIR-COWS
mm
mm
HWTHMAP
INDUCTORS
itm w c
rrrr RFC
Т1ЙМКА1
WIRING
CONDUCTORS
NOT X1IMED
BATTERIES
М0ЯЦМл* CL0«O>
IMlLTIPCMff
SWITCHES
n I n
WUMLNTA*V
ttCHMAL
GROUNDS
fhr =₽
ouesm earth
A-ANALOG
C-DGHAL
hOi-
QUART»
OW3TA1
ANTTiMA
MC1TJR
MN»	fKMANWL	*rvW*Mli	AOWNNEl	NOMMWl
wow	ил	junction fet яжи.гхил uual-mte BHuif«*TT
________ nftRSTIQriMefri ____ E>*UNCEfcEtr MODE
TRANSISTORS	*«мг«г	Mower
3MIOI
сомситин»
----UBU -----
COhTACTl
ММГ ^O4Al*
М1ЛТ1И.Е
ftKWABLfi
ASSEMB.YCR
MODULE
fOIXROUNICl
MISCELLANEOUS
LOGIC (U#>
FHQWFUM1
CUAiOAi
r~m ( * >
ил -н< CT-J [ Т~ 1
FIX® 1--1-1 1	1
FBUAdi MALE
G>lC	OMO
CONNECTORS
Deciphering Schematics
33
Chaptei 2
Component symbols come in a variety ot forms from simple discrete types like resistors,
capacitors and inductors, to complex constructs such as VLSI chips. Within each symbol type
there are also oifferent ways of depicting the same device.
Resistor
Diode
Transistor
Discrete component symbols are easily recognizable. Integrated circuits, though, can be quite
challenging, as the figure below illustrates:
U8		14
3 Л	ОД		
4 5	В	QB C	QC D	QC CLK	13 12
6		11
2 1		15
		
7	E№ ENT lCaD	
10		
Э		
74LS163
U8
10	CIRDIV16 5CT=0 Ml М2 G3	3015 G4 >C5/2,3,4+ 1	Г	15
7		
2		
, 3		14
	[11	
,4 , 5 . 6		13 12 1'
	[2]	
	[4]	
	[8]	
		
74LS163
ANSI Symbol
IEEE Symbol
Both represents tne 74LS163, a synchronous 4-bit counter iC. Tne first is an ANSI 01 common
symbol,22 while the second is an IEEE representation or logic symbol Most schematic
diagrams gravtate toward the use of tne ANSI symbols as they are familiar and easier to
interpret, however, it is inevitable tnat you will run into one of these 'rare instances of a
schematic diagram employing the more cryptic logic symbols. There is no reason for alarm
since we can easily correlate the IEEE symbol to its ANSI counterpart by referencing the IC's
datasheet.23
22 Also Known as distinctive-shape' symbol.
23 Most manufacturer will include the pinout logic diagram and truth-taole in their datasheets.
34
FUNDAMENTALS
Basic Concepts
Let s take a look at the 74i_S 163 datasheet from Fairchild Semiconductor:
FAIRCHILC
SEEMICCNO-IC 'OR iv	74 LS163
Synchronous Presettable Binary Counter
Pinout
Mode Select Table
SR PE СЕТ CEP	Action on the Rising Clock Edge (^-)
L	X	X	X H	L	X	X H	H	H	H H	H	L	X H	H	X	L	Reset (Clear) Load (Pn —> Qn) Count (Increment) No Change (Hold) No Change (Hold)
H = HIGH Voltage Level
L  LOW Voltage Level
x = immaterial
Logic Symbol	Truth-Taole
Tne pinout diagram is usually oased on tne physical ICs pin orientation arid does little to
convey its logic functions. Most schematic diagrams will not adhere to such layout for 'Cs as
it aoes not provide the signal flow convention needed fcr connectivity and can even hamper
•eadabllity.24 The logic symbol is quite similar to the afore illustration except that pm numbers
are substituted with signal names, in this case to facilitate referencing to the trutn-taole. Also,
the input signal inversion bubbles are replaced with triangular half arrows which can be less
ntuitive for those accustomed to the negating type symbol.
According to the IEEE standard, 'tne distinctive-shape (ANSI) symbol is not preferred. Some
interpret this statement to mean that the IEEE's rectangular-shape symbols are preferred
over the distinctive style. However, what the standard is simply saying is that it has no
preference over the rectangular-snape symbols compared to the distmctive-shape ones.25 In
fact, most circuit designers and drafters opted for the conventional ANSI representation over
that of the IEEE standard. This book adopts the same practice.26
Preferences asice. component symbols are not confined to just a single composition (entity)
or w'thin the same location (sheet).
24 In the past, EDA tools used for drafting schematic diagrams had symbols that are fixated in pin orientations,
forcing circuit designers to run wires and buses in an awkward manner which made readability difficult. Modern
EDA software are more intuitive and even allow fine customization of pin positions for better layout and overall
aesthetics and placements.
25 Before the introduction of the IEEE standard, logic symbols for large-scale logic elements were drawn in an ad
hoc manner. The only standard rule was to use rectangles with inputs on the left and outputs on the right.
26 Appendix В has a short but informative write-up on the IEEE implementation.
Deciphering Schematics
3b
ChaptHi 2
Like the simple 7400 mentioned earlier contains tour NANO gate elements in a package, so too
an LM358 has two operational amplifiers that can be represented separately and placed apart
m a schematic diagram.
Another example is the classic 74?4:
And it's not just analog or digital ICs that carry multiple payroads; mechanical relays like the
Teledyne’s series 712 DPDT hermetically sealed relay uses a common coil to active a pair of
douole-pole relay:
KI K2
Bottom View
Schematic Symbol
So we see why it’s important to correlate a component symbol to its physical part to better
undeistand its operation in the circuit it is used.
36
FUNDAMENTALS
Basic Concepts
Wires, Buses and Junctions
If component symbols are the nouns (objects) ano adjectives (functional descriptions) on a
schematic diagram, then wires, buses and junctions are the prepositions, conjunctions and
verbs that link up. join and act upon these objects.
Wires
Wnes are simple hne oojects that join the pins ol component sympols to each other as well
as to power and ground sources. They represent po nt-to-poirt electrical connections within a
single sheet of schematic diagram.
U1A	... WIRES
7400
Buses
Buses are ieally a collection of wires belonging to a group of signals (address, data, control,
etc.). Tney are usually drawn a little thicker tnan wires and serve tne purpose of organizing
and simplifying the schematic diagram to save space and prevent clutter.

BUSES
U7
A0			V	10	00	19	00
A1	2	11	01	18	D1
4A2		i_	12	02	17	02
.A3			£	13	03	16	03
A4	5			15	D4
					
A5		__6	15	05	14		05,
A6	7	16	06	13		06,
A7		8	17	07	12	D7
A8	9	18			
A9		11	T9			
10H8
Deciphering Schematics
37
ChaptHi 2
1 here are several ways to depict buses, three of which are shown below.
Angied
	D0
	D1
	D2
	D3
	04
	D5
	06
	D7
Straight
	DO
	О S A r
	._D3 04
	05
	06
	. D7
Combo
A lot depends on the schematic diafter or the EDA tools usee to draw the circuit diagram. The
angled and combo buses provide information on the flow direction of the signals associated
with tne buses ana can be helpful when tracing a bus components connectivity. The straight
is minimalist and is not a common occurrence.
Junctions
A junction is a simple dot27 object that indicates a connection between two or more wires, alsc
called a node or network, when two wires cross each other without a junction at the point of
inte'sect on, they are considered as unconnected If two wnes meet each other at a point,
they are treated as connected even without a junction. Sometimes, an arc28 may be used on
one of tne wires to moicate a bypass or overlap instead of connection.
Unconnected
Bypassed
or overlapped
-----1----
Connected
Connected
at a point
27 It’s usually a small circular filled object but can also be a square shape as in the case of OrCAD s schematic
design tool (SDT).
28 This type of convention can be found on older schematic diagrams but are rarely used nowadays as circuit
complexity increases, for obvious reasons. Another rare practice is connecting individual wires to a ous using
junctions. Still, it is good to know since you may encounter these outdateo piactices on some archaic schematic
draw ngs.
38
FUNDAMENTALS
Basic Concepts
Module Ports
Module ports are connecting symbols representing input, output and bidirectional signals, and
are used to link signals from one schematic worksheet to another.
| INPUT >---•
«— OUTPUT |
BIDIR
Sheet Symbols
A sheet symbol is a block-shaped entity used to represent a separate schematic worksheet it
references. Sheet symbois are usually found on the primary (root) level ot a hierarchical file
structure, and points to a suo-sheet schematic diagram. The use of sheet symbols allows a
complex circuit to be simplified into a block diagram cor an overall view of its functionalities
and connectivity. Be'ow is a full aoder citcuit comprising two half adders (sheet symbols) and
an OR ga.e. For a mo>e complex example, see overleaf.
HALFADD
Text and Labels
Text can be placed in a circuit to describe its function or characteristics to provide clarity and
readability. Example. Decoder PAL, Driver Pre-Amplifier, etc. Tney are usually located near
proximity of the circuits tney are describing.
Labels, on the other hand, are identifiers placed on elements ot a component symbols or wires
and can be electrically connected to one another without the need to connect from point to
point. One example is a bus identifier which is typically incremental (A0. Al, A2...). Power and
grounds use labels as well since they are commonly connected to ICs and many discrete parts
ot a circuit.
Deciphering Sctiernatics
3a
о
Chapter?
т
Rooi page of a schematic diagram with sheet symbols
Basic Concepts
Layout and Organization
Small ana Simple circuits can be drawn entirely on a single worksheet. Complex electronic
designs, however, may not fit even the largest worksheet available and in this case, must be
broken down into two or more worksheets. Even if a design can fit on one sheet, there may
□e practical reasons for segregating it into several worksheets, sucn as organizing the circuit
based on its functional cluster. or to facilitate a team to work on the design concurrently.
Multiple sheet circuit diagrams can be handled in two ways—flat file design or hierarchical
file design.
Flal File Design
Any schematic diagram that spans no more than five sneels is usually implemented as a fiat
file design. Re'ated component symbols are linked across worksheets by means of module
oorts that have identical names The first or primary worksheet, known as the root schematic,
orovides a list of links that point to the othei worksheets.29
Flat file design for a five-page schematic diagram
The flat file structure design is most popular with beginners and nonbyists since their circuit
ideas and designs are generally simpler and seldom exceed five sheers As designs become
more complex and even involve repetitive circuit clusteis a more efficient way of structuring
the schematic worksheets will be needed.
29 Root schematic is not a necessity though it acts as an inoex reference to the rest of the worksheets and can
help navigate the overall schematic aiagiain quickly and efficiently.
Deciphering Schematics
41
ChaptHi 2
Hierarchical File Design
This type of file structure is used tor large, complex or repetitive electronic circuits. Worksheets
are organized in a top-down layered arrangement, with the lower tier worksheets represented
as sheet symbols in the higher tier worksheets. Two types of hierarchical file structures can
be implemented—simple and complex
Simple Hierarchy
A simple hierarchical design structure interconnects worksheets in a straightforward top-down
pattern. A primary root schematic contains sheet symbols that represent other worksheets
Known as sub-sheets. The tile is structured as a one-to-one correspondence between sheet
symools and the schematic diagrams they reference. Witnin the next suo-sheets there can
also exist sheet symbols that references other worksheets cascaded downstream.
Simpie hierarchical file structure
The above illustration shows a root sheet containing three sheet symbols that point to the
next level of sub-sheets named A.SCH. В SCH and C.SCH; C.SCH in turn contains two sheet
symools that reference two third-level sub-sheets D.SCH and E.SCH. In this way сстрюх
designs can be broken down into manageable cascading30 wornsheets and tnen distrioured
among team memoers to worn on a specific sheet design.
30 Also termed nested .
42
FUNDAMENTALS
Basic Concepts
Complex Hierarchy
Л hierarchical design structure in which sheet symbols on different worksheets reference a
common separate worksheet is a complex hierarchical design. This design structure is more
useful for circuits that are repetitive in nature since such circuits need only be drawn once
and then referenced multiple times.
Complex hieiarchicai file structure
Sharp thinking readers will detect an inherent problem in reconciling reference designators of
the component symbols with the actual pnysicai PCB. Depending on tne EDA tools, tne same
circuit components may be assigned running alphabets behind their reference designators.
For example, D. SCH in A. SCH may be assigned U35a, R7a, C28a, etc , while D. SCH in C. SCH may
be assigned U35b. R7b. C28b. etc.31
31 I've encountered a sonar card with 16 transmit-receive channels and each of these channels are modularized
ana assigned the same component reference designators but occupied a unique slot so there is no conflict of
identities. Best of all, the modules are interchangeable!
Deciphering Schematics
43
Chaptei 2
Types of Circuits
The types of circuits depicted by schematic diagrams are wide and varied in nature it can be
difficult to categorize them clearly. Generally, though, they belong to three groups shown in
the table below.
Circuit Types and Functions
Types	Functions	
Analog	Powersupplies	Lmear regulator
		Switch-mode SM₽S
		AC DC, DC-DC. UPS
	Amplifiers	Audio - AM. FM, PCM
		Video - PAL. NTSC
		RF - HF, VHF UHF
	Filters	Active, Passive (LP/HP/BP)
		Linear Non-linear
	Servos / Motors	Control, PWM
		Encooer/ Decoder
		Drive module
Digital	Processors	Microprocessor (CPU)
		Mic-ocontroller (MCU)
		Signal processor (DSP)
	Memories	Volatile (SRAM, DRAM)
		Non-volatile (ROM, Flash)
	Logical	Combmatoral (Boolean)
		Sequential (Sync, Async)
Hybrid	Signal Converters	Analog-to-digita( (A/D)
		Digital-to-analog (D/A)
	Digital filters	Recursive (HR)
		Non-recursive (FIR)
	Instrumentation	Sensors, Transoucers
It is beyond the scope of this book tn give detail treatment Ю each type of circuits, since the
primary focus is on deciphering schematics.32 That said tne Appendices do provide useful
relerences to help you get started in identifying basic circuit configurations and common
topologes.
32 Readers are expected to have some fundamental knowledge of electronics in former studies to really benefit
fiom this book.
44
FUNDAMENTALS
Basic Concepts
In the next three sections, »e will look at the elements that made up these three groups of
circuits and then decipher example schematic diagrams of each type. It must be noted that
there is no such thing as a purely digital or analog circuit in real-world designs, except those
found in the classroom for illustration and teaching purposes.33 So generally, we can classify
a PCB basec on its overall functionality or the major percentage of components which it is
maae up of—digital, analog or a good mix ot botn.
Digital (top left). Analog (bottom left). Mixed (top right)
Power (middle right), and RF (bottom right)
33 Even a seemingly 'digital' POB like the Arduino UNO contains two LDOs, a MOSFET, and a dual op-amp!
Deciphering Schematics
4b

3. taenta о? (Digital Circiriba
Wnen we change tne input into our mines, we change tne output
into our lives.
Zig Z.giar
When we talk digital, there can be no ambiguity—it's either 'yes' or no1. And that's basically
what d.giial circuits are—they operate in ore of two states: 1 (the on' or high state) and 0
(the ’off’ or low state). But as digital technology advances and each generation of logic devices
saw unprecedented gain in operational speed, the term 'digital is no longer confined to the
electrical limits of ts ancestor, the venerable TTL.
vcc VOH		5.0 4.4	VCC VOH		5.0 4.4	VCC		5.0									
vih		3.5							VCC	—	3.3						
VTH	—	2.5				VOH		2.4	VOH		2.4	VCC VOH	—	2.5 2.3			
VIL		1.5	VIH VTH	—	2.0 1.5	VIH VIH		2.0 1.5	VIH VTH	—	2.0 1.5	VIH VTH		1.7 1 .2	VCC VOH VIH	—	1.8 1 .35 1.17
VOI		0.5	VIL VOL		0.8 0.5	VIL VOL		0.8 0.4	VIL VOL		0.8 0.4	VIL VOL		0.7 0.4	VTH VIL VOL		0.9 e.63 0 45
GND	1	0.0	GND	2	0.0	GND	3	0.0	GND	4	0.0	GND	5	0 0	GND	6	0.0
Logic Types:
1. 5VCVOS HC.AHC.AC	4	33V TTL & CMOS: LV, LVT, ALVT, LVC, ALVC
2. 5V TTL iTTL m/CMOS out). ACT, HCT, AHCT	5	2.5V TTL & CMOS
3. 5V TTL: STD, H, L. S. HS, LS ALS	6.	l.Sv CMOS: AVC
As the ooeratmg speed of log.c devices increases, their ooerating voltages and thresholds
orogressively shrink. This is necessary to achieve shorter switching times and reduce heat
dissioaton generated from their sub nanosecond operations.
Deciphering Schematics
47
Chaptei 3
With today's dig'tal ICs operating at different logic levels, it is not uncommon to find low-
dropout (LDO) regulators present in the circuit design that derive low supply voltages (3V3,
2V5,1V8) from a higher primary power source (12V or 9V) to power these logic devices. We will
discuss more aoout these oower devices later. Suffice to say, digital circuits are not as simple
as they used to be. In tact, analog operational amplifiers may even be found in digital cucuits
that operate ir the saturation states to mimic digital operations.-34 A parad gm shift is thus
necessary to deal with this new normal’35 in the digital landscape.
Thankfully, the fundamentals of digital electronics are still relevant and essential in making
sense of digita1 circuits ana schematics. Broadly speaking, digital circuits can do divided into
two classes cf logic circuits—combinational and sequential. I won’t bore you with the basics
of digital electronics, topics like the different numbering systems. Boolean algebra. Karnaugh
maps, etc. While it is not necessary to Know these things to decipher a digital circuit, having
a working knowledge is still an added advantage.36
Lei’s refresh a bit on the two classes ol logic circuits.
Combinational Loqic Circuits
A combinational logic circuit is one in which the present state of tne combined logic inputs
decides ttie output. The term ’combinational logic means tne combining of two or more gates
to form a required function where the output at a given time depends primarily on the inputs.
Logic gates are the basic building blocks of a combinational circuit. By using a combination of
these gates, more complex combinational circuits can be implemented
n input
variables
m output
variables
Combinational logic block diagram
34 Most operational amplifiers (op-amp; opeiate in the linear langc to provide amplification or conditioning to
the input signals, and usually employs negative feedback (closed loop mode) for control. A class of op-amp that
operates in tne saturation states is known as voltage comparators, and either use positive or no feedback (open-
loop mode) at ail.
35 The term new normal’ has been coined to prepare people to live a new way of life amid the raging CoVid-1.9
pandemic—social distancing, mask wearing, contact tracing, work from home or online study, etc. Of course,
not everyone subscribes to such measures imposed by the authorities.
36 Hopefully you have not return everything to your teachers after the examinations. Some theories we learned
in school don t make sense until we encounter them in our work.
48
DIGITAL CIRCUITS
Elements of Digital Circuits
A combinational circuit comprises input variables, logic gates and output vanab'es. These
:ogic gates receive input signals and generate the reauired output signals based or their logic
functions. A combinational circuit can be designed using the following steps.
1.	Determine available input variables and required output variables.
2.	Represent each input and output variables.
3.	Construct the truth-table that defines each input to output relationship.
4.	Obtain and simplify their Boolean expressions.
5.	Translate the final Boolean expressions into a logic diagram.
This is simple and effective for small circuits. As complexity grows, des.gnmg combinational
circuits using logic gates alone becomes cumbersome ano impractical.
Types of Combinational Circuits
Combinational circuits are found in many applications including calculators, digital measuring
equ.pment, computers, automated control, industrial processing, digital communications, etc.
Broadly speaking, combinational Circuits can be classified into three types—arithmetic and
.Ogie circuits, data transmission circuits and code converter circuits.
Arithmetic circuits are essential m tne implementation of rmcropiocessors and circuits tor
digital signal processing. In addition, there is also a need for circuits that can perform bitwise
ogic and shift operations. One of the mam components of a microprocessor, therefore, is the
arithmetic and logic unit (ALU) which comprises all the basic circuits (adder, comparator,
multiplier, divider, etc.) required tor carrying out operations on digital data.
Deciphering Schematics
49
Chaptei 3
Data transmission in telecommunications involves maximizing bandwidth usage by means of
multiplexing at the transmitter side, and demultiplexing to retrieve the data at the receiver
ena. Data is usually encoded for security and efficiency before sending out and then oecoded
oack to its original form upon reception.
Code converters are logic circuits which conven one form oi code to another, tor examples
binary to Gray, bmary to-BCD, BCD-to-7 segment, etc.
Sequential Logic Circuits
The output of a sequential logic circuit depends not only on the present input but also on the
previous state of the input. In other words, sequential ogic has memory while combinational
logic ooes not.
Sequential logic circuits aie based on combinational logic circuit elements (AND OR, etc.)
working alongs.de sequential circuit elements, latcnes and flip-flops that are g'ouped together
tofoim registers. Countermand finite state machines are examples of sequential logic circuits,
of whicn the latter is cased on either the Moore or Mealy model.
bO
DIGITAL CIRCUITS
Elements of Digital Circuits
Types of Sequential Circuits
Sequential logic is used to construct finite state machines (FSM), a oasic building dIock found
in many digital circuitries.37 A familiar example is the remote control of a television set with
channel up and ‘channel down buttons.
Sequential logic circuits are divided into synchronous (clock driven) and asynchronous (event
driven) types In the former, tne state of tne device changes only at discrete times in -espouse
to a clock signal: in the latter, tne state of the device can change at any time base on input
changes. The puise driven type is a combination of the two and responds primarily to triggering
pulses.
Applicat ons of sequential logic can oe found in flip-flops, latches, counters, smfl registe-s,
finite state machines. Some leal world examples include alarm clock timer, and traffic light
cont-oller. Digital ICs that implement sequential logic design incluae memories (RAM, ROM
Flash, etc.), programmable logic devices (PLDs), complex logic arrays (CPLDs, FPGAs, etc.) as
well as processor units (CPUs, MCUs, DSPs, etc.)
Sequential logic circuits employing clock signal for synchronization are dependent upon tne
frequency and therefore the clock pulse width to effect tneir switching actions. These circuits
can also change them switching state using either the rising edge, falling edge, or both edges
of the clock signal,
37 Virtually all circuits in real-world digital devices are a mixture of combinational and seauential logic.
Deciphering Schematics
51
ChaptHi 3
Pull Up and Pull down Resistors
When we think of digital circuits, what usually comes to mind are logic gates, registers, flip-
flops, counters, and the likes of such. Logic gates are certainly the most basic components of
digital electronics. But even these are constructed out of discrete elements such as resistors,
diodes and transistors.
Consider a 2-input NAND gate, for example
Logic symbol
Electrical diag'am
In its very core, a simple 2-input NaND gate is made up of four resistors, two diodes and three
transisters. 0* course advances in microelectronics processes have enabled the silicon
implementation to be further streamlined and simplified. But it underscores the point that all
digita1 logic circuits are analogue in natuie.38 Tnat explains the binary operation of digital
circuits wnich, ip essence, are just transistors turning ON (logic 0) and OFF (logic 1), depending
on whethe- you subscribe to positive or negative logic convention.
With this understanding, the application of pull up and pull-down resistors, and the presence
of termination impedance in digital circuits will make perfect logical sense (pun intended).
Digital circuits do not permit ambiguous conditions to exist as far as inactive or unconnected
inputs aie concerned’ this is also true foi open-coilectoi (TTl) or open-dram (CMOS) networks
that are logically wired (both AND OR).39 The one exception is the tri-state data bus whicn is
commonly found in microprocessor-based circuits.
The most common method of ensuring tnat the inputs of digital logic gates and circuits ao not
self-bias and float about is to either connect them to tne source voltage (logic mgn) or to the
grouna (logic low). But such direct connection is impractical as it renders any active input
stuck in a fixed state and therefore unusable unless it is a oedicatcd input pin.
38 Which is why the complexity of microprocessors are always denoted in terms of the number of transistors they
are fabricated with instead of logic gates quantity.
39 In general, wired-AND and wired-OR are used in situations where devices are not vying for attention, and only
drive the line when explicitly addressed and asked to do so.
52
DIGITAL CIRCUITS
Elements of Digital Circuits
To reiterate, there are several reasons for using pull-up/pull-down resistors at the inputs or
networKS in digital circuit designs.
1.	To prevent ambiguity, i.e. no ranocm cnanges uoon power up or when a wired network
is left floating.
2.	When the output driveis are of non-tofem pole structures, i.e., open-collector ano open-
drain outputs.40
3.	For impedance adaptation to serve as line terminations in h.gh-speed designs.41
The resistor's vaiue will always be application dependent. Impeoance adaptation termination
resistors will usually have low values (below IK; and pull-up and pull-down resistors will have
medium values (octween 2K7 to 5K6) for traditional TTL circuits, or hign values (22K to 100K)
for some CMOS and the more modern designs.
Г7
16
15
14
13
12
’1
0
1
Considei two instances of a 3-state octal bus buffers (54HCT541). The first is configured as an
IDcoaefoi a PCB hence its inputs can be permanently tied to VCC and GND to effect the binary
value 10011010 when queried by a system mastei using the PCB_IC command.42 Inthe second
case, four of the inputs are connected to open-collector outputs of opto-couplers that interface
to 1he real-world and hence must he pulled high (RN4). Interrogation by the system master
using the I0_INT command will then determine which devices may be requesting for service
oy a logic low state at tne U29’s outputs.
«г npn type outputs will require pull-up whereas PNPtype outputs will require pull-down at the driven inputs.
41A common application can oe found in computer circuits with DDR3 and DDR4 SDRAMs
42 Such inputs are therefore considered fixed or dedicated. Alternatively, they can be connected to an 8-bit dip
switch with pull-up resistors on one side and GND on the other end. An open will be logic high and a close will be
logic iow. However, configurability does come at the expense of additional components and PCB space, which
ados to the cost and incur extra design considerations.
Deciphering Schematics
b3
Chaptei 3
Pull-down resistors are particularly useful for latches, counters and flip-flops that require a
positive one-shot t'iggcr. such as when a switch is momentarily closed, to effect a change in
state.43 Consider the following debouncing circuits, one using NAND gates and the other using
NOR gates:
NAND Configuration
NOR Configuration
Tne operaton of the cross-coupled NOR gate debounce circuit is the same as for the NAND
circuit except tnai the Q output is a logic high when the switch is in position В and a logic low
when it is in position A.44
Matching and Termination Resistors
High-speed digital circuits are commonplace these days. As data rate increases—ringing,
crosstalk reflections, ground bounce and imoecance mismatch issues sudace and lead tc
signal distortion and errors. PCB designers address these signal integrity issues oy employing
signal routing, termmat'on scnemes and power distribution tecnniques to minimize impact.
When decipnering high-speed digital circuits, bear in mind that impedance control measures
will most certainly be present, so it's important 1o have some basic knowledge to recognize
these Termination scnemes.
Parallel Termination
The termination ies:stor (RT) is equal to the line impedance and is placed as close to
the load (L) as possible tor maximum efficiency. The current loading of this termination
resistor is maximum at a high-output state.
43 While they may seem to operate in the same way as the pull-up resistor- the value of a pull-down resistor is
more critical with TTL than with similar CMOS gates. This is because a TTL input sources much more current out
of its input in its logic low state.
44 The reason is because the NAND configuration requires a logic low input signal tc change state while tne NOR
configuration reouiresa logic high. Note also the resistor values are different for pull-up and pull-down.
54
DIGITAL CIRCUITS
Elements of Digital Circuits
S>4D
Zo = 500
Scries Termination
The impedance is matched at the signal source (S) instead of the oad (L). This scheme
is useful in attenuating secondary reflections. The line impedance will vary depending
on the distr'bution of the load. Therefore, a single resistor value is not applicable for
all conditions.45
-VA-r Zo = 50Q
Low Z
Series-RC Parallel Termination
In this scheme, the resistor and capaciw (>100pF) combination act as terminating
impedance. Here, the termination resistor (RT) is equal to Zo and the capacitor blocks
the low-frequency sigrial components and passes the hign-frequency components Sc
the DC load.ng effect of RT does not impact the driver.
Input low = High Z
S _ Zo = 50Й Q-^-^>L
Active Parallel Termination
The termination resistor (RT) which equals to the line impedance (Zo) is pulled to a bias
voltage. The bias voltage allows the output driver to extract current from both nigh and
low-level signa’s. This technique reauires a separate voltage source that can simt and
source currents to match the output transfer rates.
45 This method requires only a single component at the source rather than multiple components at each load.
The flip side is delays are introduced on the signal path due to increase in the RC time constant.
Deciphering Schematics
55
ChaptRi 3
VblAS
I
<RT = Zo
7о	Input high1 High Z
Thevenm Termination
It is an alternative to the parallel termination scheme, where the termmat'on resistor
(RT) is split into two separate resistors and is equal to the line impedance ;Zo) when
combined (R11 |R2). This metnod recuces the current drawn from the source ana
instead draws current from the power supply because the resistors are placed between
VCC and ground.
R1 || R2 - Zo
Differential PairTermination
This scheme requires a termination resistor between the signals at the receiving device.
The termination resistor (RT) must match the differential load impedance.46
O* course, these are just basic configurations, in real-world applications, the implementations
are more involved, such as those found in RS-422 and RS- 485 circuits. We will look at some
examples in the next chaptei when we decipher a PCD with those devices. Summing up what
we have discussed so far. there is another crucial area of application for these resistors—
DDR memories.
46 Tvpically, 100 ohms.
56
DIGITAL CIRCUITS
Elements of Digital Circuits
DL)R4/ Memories (First Luok)
It s kind of early to talk on an advanced topic like the DDR memories at this point, except for
reason pertaining to its peculiar operating requirements that involve the use of termination
resistors.47 48 49
DDR memories are a popular choice of designers in complex devices (.aptops. mooile devices,
servers, embedded computing systems, etc.) due to its large stoiage capacity, low latency ana
power consumption As of this writing, DDR memories are into its fifth generation with a 25-
fold increase in data transfer rate over early predecessors. However, each generation of DDR
memory requires d.ffe'ent core, logic and I/O voltages, along with precision tracking reference
(VTTREF) and high current capable mid-rail termination voltage (VTT) to achieve the expected
performance.
The goal of terminating DDR memory signals is to maintain signal integrity. The termination
style depends on the application. Two classes of data termination that meet the requirements
of EIa/JEDEC Stancaid JESD8-9A are shown oelow:
SSTL_2 Class I Termination49
Vtt = 1.25 V
Vtr = 1 25V
Rr = 500
Rl = 500
Output
Buffer
Vref = 1.25V —1 Input
Buffer
SSTL_2 Class II Termination
47 Double data rate. Unlike conventional memories (SDR) which transfer data on a single clock edge, DDR uses
both clock edges to achieve double transfer rates, hence the name.
48 These are mentioned in passing here for the sake ot completion, but rest assured we II have more to say about
DDR in the Memory Devices section later.
49 Stuo Series Terminated Logic (SSTL) is a group of electrical standards for driving transmission lines commonly
used with CRAM based DDR memories.
Deciphering Schematics
57
ChaptRi 3
Class I termination is also known as single parallel terminated output load with senes resistor
whereas Class II termination is known as double parallel terminated output load with series
resistor. Since DDR memories transfer data on both edges of the clock, it's important to reduce
noise and reflection, which is why DDR clocks are usually routed as a differential pair in a point-
to point topology.
Differential clock termination
Decoupling Capacitors
Most people think of capacitors as just eneigy storage or filtering devices. One of the essential
applications, however, is found in PCBs with lots ot integrated circuits. These tiny blocks of
marvei are usually located neai to analog ano digital ICs where they serve a primary purpose:
decoupling. Their job is to suppress high-frequency noise in power supply rails by removing
tiny voltage ripples which could otherw se damage these delicate ICs
In a way. they are the local power source to ICs much like an uninterrupted power supply is to
computers. This subtle funct on is esoecially critical in a large digital design where transistors
in the millions are switching states every nanosecond. The large current surge and sink can
cause fluctuations in the rail voltages and
result in circuit malfunctions.
Decoupling capacitors can briefly hold tne
supply rails steady by acting as temporary
sower reservoirs, which is why they are also
known as bypass capacitois because they
‘byoass the power suophes by filling in the
gaps when needed.50
A common practice is to group all decoupling
capacitors together in one place to optimize
space, reduce clutter and awkward wire runs
that may obscure the design.
UNLESS OTHERWISE STATED AlL CAPACITORS
ARE 0.1UF IN VALUE.
50 Another way of looking at it is high frequency noises due to large switching of transistoi gates are bypassed
(shorted awayl by these capacitors and prevented from reaching and affecting the ICs.
b8
DIGITAL CIRCUITS
Elements of Digital Circuits
The phrase 'grouping in one place’ needs to be clarified because different circuit designers
nave different ideas about placing decoupling capacitors in their schematic diagrams. Some
prefer to group these capacitors in a single sheet, whetner it s the first or last of their multi-
sheet drawings. Others tend to group them together with the ICs they belonged to. so each
sheet will have its own local grouping of decoupling capacitors.
To 'liustrate the latter, let’s look at two sample sneets of a schematic diagram that uses this
way of grouping:
Decoupling capacitors for signal buffers51
The first sample snows two groups of capacitors at the top right corner of tne schematic sheet
designated‘DECOUPLING FOR CHIPS ON THIS SHEET’(.see arrow). They comprise seven and
four capacitors tied to the 3.3V and VCC supplies, respectively. While it does not indicate which
capacitor belongs to wnat IC, you can easily guess oased on the types of IC present. There are
seven 74LVT245 octal buffer chips so that’s wnere the 3.3V decoupling capacitors oelong'
similarly, There are four 74F38 open-collector 2 input NAND gates (U3 -U4, U11, U78), so logically
that’s where the VCC decoupling capacitors should go to.
51 Courtesy of Rutherford Appleton Laboratory. Chilton.
Deciphering Schematics
59
Chapter 3
Decoupling capacitors for a Xilinx FPGA 52
The second sample shows now large numoer of decoupling capacitors can oe connected to a
Dig chip like an FPGA wnich ielies on multiple power sources for its operation, in this case four
of them—3.3V, 1.5V, 2.5V and 2.5Vaux.
Also notice a smaller IC at the lower left corner of the schematic sheet, wnich is a fragment of
the same FPGA designated BODY 10 OF 1Г. As the sizes of ICs run into hundreds ot pins.* 53 it
Decomes necessary to segregate tnese chips into multiple parts Dy tneir functionalities, like
in this instance, the FPGA s power and ground pins (BODY 11 OF 11’), and tne program
initialization logic pins (mode contro., data, configuration, power status, etc.). The remaining
nine parts of tne FPGA are spread across other sheets of the schematic diagram with relateo
circuitries that support its integ'al functions.
» ibid.
53 The Xilinx FPGA in this sample schematic is an XC2VP30-5FF896C. As the part number indicates, it's an FBGA
chip with a whopping 896 pins!
60
DIGITAL CIRCUITS
Elements of Digital Circuits
Power-On Reset (PuR)
A reset signal, whether manually applied or upon power up. is primarily used to initiate a digital
circuit into a known or predictable state. It can be local to a specific aevice such as a CPU. or
global in extent as to affect multiple components on a large circuit A power-on reset (PoR)
therefore provides a predictable, regulated voltage tc a microprocessor or microcontroller with
the nitial application of power and ensures that the processor will star* in tne same condition
every time it is powered up.
VCC
T
<R
О---PRESET
ic
(a)
VCC VCC
* RESET
The most basic PoR circuit is made up of a resistor and capacitor with values chosen54 sucn
that when power is first applied, the capacitor takes a predictable and constant time to cnarge
up to release tne processor from its reset state. Figure (a) is simple out has a drawback—
when power is removed the capacitor takes some time to discharge and may cause erratic
circuit behavior. By adding a diode across the resist» it will allow the capacitor to oiscnaige
faster and avoid this problem. Depending on whether the processor uses a high or low reset.
figures (b) or (c) can be use appropriately.
For more complex systems, additional components aie often
required. such as e Schmitt trigger inverter (see figure). A
pushbutton switch can also he added to allow manual reset in
the event of a system hang up.55 The RC circuit then acts as a
debounce for the mechanical switch.
Microcontrollers and some complex ICs have different internal functions that power up at
different 'ates. For example memory devices may need to эе initialized before the processor
can control and use it. Some processors may even have their own internal PoR circuit, and
multi processor designs or circuits that use more than one operating voltage may require
certain power up sequencing scheme to function properly.
54 When designing a PoR circuit, the charge-up time is usually adjusted by trial and error until the processor or
contioller circuit can set itself to the correct initial values before normal operat.on begins.
55 This feature is useful for debugging purpose during the circuit design stage and may be removed once the
hardware or software issues are rescved.
Deciphering Schematics
61
Chaptei 3
Clock Generation Circuits
Quartz crysta s or oscillators are found in most processor-based oesigns. The former has a
sinusoidal output and s typically used if the target IC has an integrated oscillator and on-chip
phase locked loop tPLL) for internal timing. The lattei is an independent external сюск source
that outputs a square wave. When a crystal ana oscillation circuit are combined m the same
package, it is known as a crystal oscillator
Quartz Crystal
Casing r Internal Symbol Equivalent Circuit
Tne Pierce crystal oscillator is a popular choice among circuit designers because of the ease
of implementation inside an IC, gooc stability and hign Q. A Pierce crystal oscillator primarily
comprises a logic gate inverter whicn acts as an amplifier ;gam stage), a feedback resistor
oetween the inverter’s input and output, and an external crystal component. This arrangement
is known as a parallel resonant circuit.
Costal Oscillator
Casing + Internal56 56 Courtesy of Rakon L irnted.	KF 	Ш	 11	^>o	< >—O XTAL	RS 4 z^:Cl	zb:C2 Equivalent Circuit
62
DIGITAL CIRCUITS
Elements of Digital Circuits
The difference between using a quartz crystal and an oscillator is illustrated in the following
diagram:
Translating this to scnema representation:
For tne quattz crystal:
1.	A series resistor (Rs) may be required for crystal resonator with low drive level.
2.	The value of Rr varies with the oscillator mode se ected.
3.	An additional parallel feedback resistor (Rp) may be required for p'oper operation.
Digital circuits are mostly sequential in nature and depend on clock signals to function. In this
respect, clocxs are like the heartbeats that aetermune the operational speed of digital circuits.
Clock generation circuits can use a combination of analogue and digital circuits to produce a
tree-running or continuous senes ot pulses (astabie), or a single pulse with specific duration
(monostable). Two or more of these multivibrator circuits can then be combined to generate
the desired pulse patterns of certain pulse duration and frequency.
Deciphering Schematics
63
ChaptRi 3
bxarrples of clock generation circuits:57
57 Linear Technologies, Application Note 12. Circuit Techniques for Clock Sources.
64
DIGITAL CIRCUITS
Elements of Digital Circuits
De Morgan's Theorem
In Boolean algebra. De-Morgan’s Theorem is really a pair of transformation rules that are both
valid rules of infeience. which can be expressed thus.
•	the negation of a	disjunction is the conjunction of the	negations, and
	the negation of a	conjunction	is tne	disjunction of the	negations
In simple logical terms:
	A + в = A • в
	A • В = A + В
These rules can be illustrated using .ogle gates and truth tables-
in the first place. Well, in a subtle way. Circuit designers are known to be rather conscious of
cost savings—by using a minimum numbei of components to reouce wastage and achieve
the deseed circuit functionality.58 This is especially true when it comes ro circuits that involve
discrete logic gates.
58 In the early days when the Japanese were mass producing household erect-onic products, it was well known
tnat their team of designers would go through numerous iterations over a circuit to squeeze out any component
they deemeo excessive or non-consequential. Even a savings of just one resistor would be considered a great
achievement, since production volume could run over a million units. So, a $0.03 reduction per unit would mean
a savings of $30,000 in total.
Deciphering Schematics
6b
Chaptei 3
Foi example, to implement the following Boolean function:
Y = A.B + C.D
Tne straightforward solution would be to OR two AND gates
together, as shown in the right figure. In theory this is both
correct and acceptable. But when it comes to circuit cesign
this is poor economics. Why is it so?
Because in the real world, you will need two ICs to implement the above circuit—a 7408 and
a 7432. Both ICs are quad packages containing simiiai logic gates, which means you only use
two out of tour AND gates in the 7408 and one out of four OR gates in the 7432, a wastage of
two AND gates ano three OR gates. Is it possible to recuce the IC to just one and use a single
type o‘ gates to implement tne same Boolean function? Certainly! This is where De-Murgan’s
Theorem come into play.
Negation
Transformation
By inserting negations at both end of the logic gates and then transforming rhe disjunction OR
to a conjunction NAND, we have a circuit witn three similar logic gates that performs the same
Boolean function. A 7400 is all tnat is required, and the wastage is now reduced to just one
NAND gate.
This is a clever design gymnastics to save cost: however, it obscures tne functionality ot tne
circuit and makes deciphering more difficult. Thankfully, since the advent of programmable
logic devices (PLDs),59 the chances of encountering circuits that use discrete logic gates are
□ecoming less common, but it bears tc keep this in mind—just in case.
59 PlDs are a lifesaver for many circuit designers, not only for their versatility as a biack box that allow design
modifications without physical changes to the PCB, but also implement circuit functionalities in terms of Boolean
equations without the need to translate them into actual discrete logic gates- Well, not entirely so as we'll soon
find out in the section that deals with these devices.
66
DIGITAL CIRCUITS
Elements of Digital Circuits
Memory Devices
Broadly speaking, there are two mam types of memory devices—volatile and non-volatile.60
The former acts as tern oorary storage for working data and allows read/write operations to be
performed: rhe latter is of a more oermanent nature meant for sconng program instructions
that are to эе retrieved for execution.
Volatile Memories
Random access memories (RaMsj can be classified as either static or dynamic based on their
implementations. Static RAM (SRAM) uses a six-transistor memory cell to store one bit of data
whereas dynamic ram (DRAM) employs a transistor capacitor pair. For this reason. SRAMs are
more costly to produce yet do not match the memory density of DRAMs for a given amount of
wafer size Conversely, DRAMs 'equire memory refreshing to reta.n data so extra supporting
circuitries are needed, unlike SRAMs.
NC 1	28	VCC	NC	1	C 27	WE	2	2 16 CSO	3 1 ~6	--	RAS	4	[ 25	a8	Д0	5	[ 24	A9	Л2	6	f f 23	A11	A1	7	f 22	0Ё	VDD	8	C	«	16 VSS 15 CAS I 14 Q | 1 3 A6 112 A3 ;i 11 A4 10 A5 9 A7
Al 2 2 Ki з: A6 4 [ A5 5 [ A4 6 r A3 7 [		I	J	
A2 8 A1 9 £ A0 10 □ D0 11 □ D1 12 □ D2 13 □ GND 14 Г	21 A10 A0-A7 ADDRESS INPUTS 20	1	CAS COLUMN ADDRESS STROBE 19	D7	D	DATA IN 18	D6	Q	DATA OUT ]7	„	RAS	ROW ADDRESS STROBE WE	READ/WRITE ENABLE 16	D4	VDD	POWER [_j 1 5	D3	VSS	GROUND		
7164 (8K X 8 SRAM)	4164 (64K X 1 DRAM)
A comparison of two similar capacity RaM chips will give us an iaea of what entails in their
memory organizations and now the data are stored and accessed. SRAMs are quite simple;
DRAM, on the other hand uses a multiplexed addressing scheme that involves a row-column
matrix structure, requiring two additional signals RaS and CaS.
60 Some memory devices are semi-volatile such as the EEPROM and HASH, which can be erased or overwritten
electncaily and still retain data after power is removed. Tnough these are repiogrammable. they do not perform
as weil as RAMs in read/write access speed and are still regarded as permanent stoiage devices.
Deciphering Schematics
6/
ChaptRi 3
SRAMs can work standalone because ot their data width, which is usually 8- bit wide. DRAMs,
however, need to work in groups to achieve the required data widths, whether it’s 8, 16, 32 or
b4 bits. SRAMs are commonly found in singie-board computer and embedded designs that
employ direct addressing with minimal memory requirements. DRAMs, however, are used in
memory intensive applications like grapnic workstations and computational platforms such
as desktops, laptops and now, mobile devices.
As DRAMs gained popularity with increased size and speed performance, they also evolved to
meet the bandwidth, requirement of PCs ana operating systems, from the 8-bit bus width of
iBM XT s ISA architecture to its 16-bit EISA successor in tne PC/AT models, then tne 32-bit
PCI bus which overtime suppods 64-tit data transfers. Memory modules a’so underwent
several transformations, from the early asynchronous dram to fast page mode (FPM) and
extended data out (EDO) memory sticks, the PC landscape is now flooded with SDRAMs. DDR
and QDR modules To make things even more confusing, each of these memory types utilizes
different interface format, with variants of SIMM. DIMM and RI.MM for desktops to SO-DIMM and
SO-RIMMfor laptops and notebooks.61
3J pin SIMM
184 pm RAMBut RDRAM PlMM
100 pm DIMM
printer RAM
144 pm SDRAM
SOD MM
20C pm DOR
SOOiMM
200 pm DDR2
SOD MM
168 pm SDRAM DIMM
184 om DOR OHMM
240 pm DOR2 DIMM
Memory Stick Formats
I won’t go into details on the diffeiences of these memory modules. Suffice it to say that these
memory modu'es are synchronous in design and operation, running from a single clock cycle
(SDR) in the early days to the present oouble data rate (DDR) and quad data rate (QDR) with
more efficient data transfei rates using sopmsticaieo clock cycle implementations, as shown
in the following clock timing diagram:
61 SIMM—Single In-line Memory Module. DIMM—Dual In-line Memory Module RIMM—Rambus In-line Memory
Module. SO-DIMM—Small Outline DIMM. The difference between SIMM and DIMM is that SIMM has pins installed
on their sides, while in DIMM, the pins are independent. SIMM provides a maximum of 32-bit of channel for the
data transfer while DIMM allows 64 bit foi the data transfer through them.
68
DIGITAL CIRCUITS
Elements of Digital Circuits
SDR
Single Data Rate
DDR
Double Data Rate
QDR
Quad Data Rate
SDR-SDRAM
Unlike o'der and obsolete asynchronous forms of memory. SDRAM shares a common clock
reference with the CPU. The CPU and memory are slaved together, allowmg the CPU to transfer
data to and from memory whenever it wants to. rather than requiring the CPU to wait for an
arbitrary wmoow to do so.62
DDR-SDRAM
Double data rate (DDR) SDRaM is an imorovement over the SDRAM, which is also called single
data rate (SDR) SDRAM for differentiation. DDR aoubies tne amount of data transfer per clock
cycle thereby effectively douplingthe peak memory bandwidth. DDR2 improves on the original
DDR standard including increased bandwidth, lower operating voltage (1.8V vs 2.5V), lower
cower consumption and improved packaging. DDR3 reduces power consumption oy 40% over
the DDR2 by lowering the operating voltage furtnei (1.5V) with two additional functions—
automatic seif-reftesn (ASR) and seif-refresn temperature (SRT).63
QDR SDRAM
QDR uses two docks, one for read data and one for write data and has separate read and write
data buses (sepa-ate I/O), whereas DDR uses a single clock and nas a single common data
ous used foi both reads and writes (common I/O). This eliminates oropagation delay caused
oy clock wiring and gives the illusion of concurrent reads and writes.64
62 SDRAM speeds are specified in MHz rather than in nanoseconds, as was true of earlier forms of memory.
63 The SRT feature allows the memory to contiol the refresh rate according to tempeiature variation.
61 Internally the memory still has a conventional single port: operations are pipelined but sequential.
Deciphering Schematics
6s
ChaptHi 3
Non-Volatile Memories
Non volatile memories are read only memory (ROM) devices that can store or hold data even
after power is turned oft. The data in these memory devices were either fabricated directly
onto the die during the production process (ROMs) or programmed into the circuit using
dedicated equipment (EPROMs EERROMs). Present day non-volatile memory devices employ
FLASH technology which can be written 'In-circuit' much like RAM, except it's much slower and
must be done in blocks instead of single oytes.65
Re programmable ROMs must first be erased before they can be overwritten, EPROMs гаке
longer to erase because of the exposure time needed66 whereas EEPROM and FLASH require
lesser time since erasure is done electrically, with the added advantage of re-progiamming
without the need to remove the chip from its PCB.
There are similarities between EEFROM and FLASH: both are non-voiatne memones and can be
brogrammed electrcally. But there are also differences—FLASH usually has fewer rewrite
cycles than EEPROM, typically ten times lesser. However, FLASH tends to have faster reading
speeds and larger memory capacities than EEPROM too.
65 Also, there is a limit to the number of write-erase cycles—typically 100,000--before the device starts to
oeteriorate and become unreliable.
66 EPROMs are usually ceramic type built with a glass window that exposes the die and bond wires within. This
is to facilitate content erasing using certain wavelength UV light for a specific time period. The re programming
voltage is also much higher than the normal operating voltage, usually 12.5V.
/0
DIGITAL CIRCUITS
Elements of Digital Circuits
When discussing memory devices, it is imperative to mention their use in embedded systems
which usually store their firmware on-chip within microcontrollers (MCUs). However, on-chip
memory implementation, besides added cost and power consumption, also severely restricts
the program size due to the amount of memory that can be fitted in with, the rest of the CPU
and supposing hardware. Advancements in interface protocol and memoiy oesign has seen
increasing use oi off-cnip non volatile memory (NvM) to host larger firmware program without
the above issues.
Embedded NVM Shadow FiASH On-Chip SRAM XiP NVM
For small designs, embedded NVM will be tne most efficient and straightforward solution. On-
chip SRAM array backed up by an external serial FlASH device can be an alternative solution
for high performance low power mCU designs. Since it requires two copies of the firmware—
cne in the external FlASH and another in the SRAM—it is a shadow FLASH configuration.67
The use of eXecute-in-Place (XiP) memory is fast emerging as a preferred solution. The mCU is
augmented with an instruction cache that holds frequently used code segments; whenever it
cannot find tne required instructions within the cache, tne MCU initiates an access to the
external FLASH to load the missing instructions into tne cache.68
Embedded designers may choose a hybrid approach where they keep the berformance-cntical
oarts of their program on chip (in ROM. Flash or SRaM) and use an external FLASH in an XiP
mode for expanding their system. These are the possible configurations to look out for when
deciphering embedded application circuits.
67 Th-s approach has several drawbacks. Large on-chip SRAM arrays are expensive. Due to SRAM leak current,
they neeo to be turned off when the system is in power-down mode, requiring a repeat of tne power-hungry, time-
consuming copy operation eacn time the MCU wakes up. Also, the size of the SRAM in a specific MCU is fixed
and may be too big or too small for a specific application.
68 With the introduction of the new JEDEC xSPI protocol (JESD-251), data transfer ciock speed to tne FLASH may
reach up to 209MHz with an 8-bit wide data path for a DDR chip implementation.
Deciphering Schematics
71
ChaptHi 3
Programmable Logic Devices
Programmable logic devices (PLDs) are logic black boxes that can be configured to perform
simple or complex logical functions using Boolean equations or schematic representations
depending on the design tools used to create and program them.
Programmable Logic
Factory programmable devices are manufactured in the factory according to certain design
specifical ions and then tested toi verification. These devices can be programmed only once
and usually at tne factory. Field programmable devices are programmed outs.de of factory
using specialized equipment; some can only be programmed once while those with UV erasure
windows or are elect'ically erasab.e can be programmed multiple times.
Masked ROMs are a type of read-only storage whose internal information are programmed by
the manufacturer. These devices conta ri software masks which are burned nto the chip dies
during tne designing stage. MPGAs consist of amays of pre-fabricated transistors tnat can be
customized .nto usei-defined logic circuits, carried out during chip fabrication by providing the
metal interconnections, either with.n rows or between rows of transistors.
PlDs contain programmable logic elements (LEs) and a network of reconfigurable nodes that
allow the LEs to be physically connected. Tnese basic building blocks can be programmed to
perform simple logic gates (AND, XOR. etc.) or complex combinational functions. These logic
blocks may also contain memory elements from simple flipflops and registers to complete
memory blocks. Pl Ds have many design advantages, including rapid prototyping, shorter time
to market, and rhe ability to re-program in the field.
/2
DIGITAL CIRCUITS
Elements of Digital Circuits
Spl Ds are the most straightforward, cheapest, smallest and least-power consuming type of
field programmable devices. They are used in applications where only a small number of I/Os
are required. Examples are PROMs, Pi_As, PALs and GALs, each with their own structures and
implementations.64
tn Ou Ip tu line»
Л Input
Variable»
00 * «1
(П-fll
OO- Ю
CO- -II
11 • • • IX»
I! ••  П1
11 • • IU
II ••• II
mOwjxil
Variable.
MS)*** HO
mo-in
wi   101
HO- -Olli
«II - • -Oil
no* > * no
он •  «*>
III • 101
A PROM is a memory device which stores binary information permanently and has a fixed AND
array and a programmable OR array, so the output of a PROM is a sum of min-terms. PlAs have
noth programmable AND OR arrays, thus the outputs are the sum of product terms. PaLs consist
of a programmable AND array followed by a fixed OR array. The output of PAls will be in the
form of the sum of products. GALs are an advanced version of PALs ar.d nave the exact same
architecture as pals, the only difference being the AND array of GAls can be erased and
programmed again. The output logic of GALs is also reprogrammable.69 70
69 Electrically erasable PLDs have more or less replaceo PAI s and PLAs in the practical world. Even UV erasable
types are gradually being phased out.
70 In addition to the AND-OR arrays that PALs have, most PLDs have some kind of macro blocks that contain
multiplexers and additional programmability. All typically have tristate ouffeis at the outputs and some of them
Deciphering Schematics
73
ChaptRi 3
Inverter/Bufter
Array
AND
Ar^ay
OR
Array
Device Types	AND Army	OR Array	Output Logic
PROM	Fixed	Programmaole	Fixed
PLA	Programmable	Programmable	Fixed
PAL	Programmable	Fixed	Fixed
GAl	Programmable	Fixed	Programmable
Summary of PLD architectures
Tne following aie 20-pin DIP examples of SPLDs for side-by-side comparisons:* 71
	PROM		PLA		PAL		GAL	
AO 1	*	j 20 VCC 10 1 [	ю	20 VCC 10 1 [		20 VCC I/CK 1 L	1—1 «	Q 20 VCC
Al 2 [		f| 19 a8 11 2 C		19 B9 11 2 E		19 0	II 2 Г		П 19 10
A2 3 [		11 8 A7 12 3 L		8B8	12 3 [		18 10	12 3 L		18 10
A3 4 f	CTl	17 A6 13 4 E	<	17 B7 13 4 E		’7 10	13 4 Г	co	fl 17 10
A4 5	£	,16 A5 14 5 E	LO	16B6	14 5 E	ro	610	14 5 L	<0	Ei 1610
Q0 6 Г		I15 0E 16 6 f		115 B5	15 6 [	5	[] 15 10	15 6 r	Zj	7 15 10
QI 7 [	<	I14Q7	16 7 Г	co	14B4	16 7 E	2	410	16 7 L	0	14 10
Q2 8 [		13Q6	17 8 Г		13B3	17 8 E		13 10	I’ 8 Г		f| 13 10
Q3 9 [		112 Qb B0 Э [		12 B2 18 9 E		2 0	18 9 L		112 10
GND 10 [		111 Q4 GND 10 Г		 1 Bl GND 10r		11 19 GND 1 0 Г		'I 11 I/OE
Apart from PROMs, programming languages for these low-complexity logic devices include
PAi ASM, CUPL and ABEL which translate Boolean equations ana state transition tables, or
compile C program codes into fuse map JEDEC formats, the file type supported by common
PlD programmers.
have a dedicated output enable as well. Fora more detailed treatment refer to A Tour of PLDs oy Professor Ben-
Avi on the pldworld.com website.
71 SPLDs are by no means limited to just the DIP type. There are also SOIC and PLCC implementations of the
more popular and recent models.
74
DIGITAL CIRCUITS
Elements of Digital Circuits
CPLDs are logic devices with completely programmable AND/OR arrays and macrocells—the
main building blocks containing comolex logic elements for implementing disjunctive normal
form expressions, and are the functional blocks responsible for sequential or combinatorial
.ogic operations. The AND/OR arrays are completely reprogrammable to carry out various logic
functions.
An example is rhe Xilinx CPLO XCR3064 chip which comes in a
100-pin PLCC cnip The simplified block diagram shows that it
contains four function blocks wnich are AND/OR array PLas that
are linked to a central interconnect array (IA). Each function
block has 16 macmceils that are tied to individua1 I/O channels
and these along with the macrocells are routed back to the 1a.72
Unlike the SPLDs, CPLDs can be electrically programmed in-
system over a JIaG interface, giving it added flexibility.
I
HXILINX® 
XCR3064XL”*	'
PC449MN0620
D1200839A
71
36 Incuts From IA Xilinx XC3064 CPLD Block Diagram (top) and Detailed
Part of PLA
Simplified Macrocell
Output Cell
72 Essentially, a CPLD is made up of PAL-like logic blocks that are Jinked to a progiamrr.able .nterconnect matrix.
Deciphering Schematics
75
ChaptRi 3
FPGAs contain many configurable logic blocks (CLBs) embecded in a sea of programmable
interconnects. These CLBs are incredibly complex compared to the CPLU s macrocells and can
implement vastly more complex logic functions. They are primarily made of юок-up tables
(Lilts), flio-flops and multiplexers.73
SWITCHING BLOCK
Unlike CPLDs which are ROri-based, FPGas are RAM-based and always blank upon power-up. A
configuration circuit is therefore needed to read configuration data from an external ROM to
configure the CLBs. Due to their massive architectures, FPGAs take time to be configured each
time they are powered up before they are ready to perform their intended functions.74
Two major manufacturers of FPGAs are Altera and Xilinx,75 and these players have their own
families of low. mid-rang₽ and high eno prooucts. as well as proprietary software development
tools and piogramming equipment for designing and configuring their FPGa chips
	Altera	Xilinx
Low-End	Cycione	Spartan
Mid-Range	Ama	-
High-End	Stratix	Virtex
73 FPGAs can contain millions of CLBs and flip-flops in a single device—compa _e that with just 512 flip-flops in
the biggest C°LD from Xilinx!
74 Some manufacturers have produced FPGAs with built-in configuration FLASH. Even so, the configuration data
is not embedded in the fabric of the LUTs, and certain amount of configuration/setup time will still apply.
75 Other lesser players include Actel. MicioSemi and ^attice Semiconductors.
/6
DIGITAL CIRCUITS
Elements of Digital Circuits
Apart from their inherent logic elements, FPGAs cap contain dedicated hardware such as RAM,
nigh-speed transceivers, digital signal processing (DSP) blocks, external memory controllers,
chase mcked loops (PLLs) and mixed-mode clock managers (MMCMs). etc. In terms of variety
of choices and flexibility, CPlDs are certainly no match for FPGAs!
Column ot
dual-pod RAM
ligh speed serial J
transceivers —
Column ol L)SP48
(wide multiply—
accumulate) blocks
Pnase-locked loop (F
clock generators
External
memory
controller
Specialized hardware on FPGA76
Deciphering digital circuits containing programmable logic devices can be tricky, if not difficult,
because of tneir Ыаск box nature and in the case of CPLDs and fpgas, the large number of
pms p'esent Still, we can derive helpful hints based on tne споюе of CPLD or FPGA used in a
circuit design. When a design requires just simple glue-logic.77 or functionality which doesn t
need to be changed much or an instant-on circuit, then CPlDs are tne best bet. Otherwise.
FPGAs are generally prefeired. Sometimes we may find both CPlD and FPGA in a design, in
which case the CPLDs generally perfoim simple glue-logic ano are responsible for booting the
FpGa as well as controlling reset and boot sequence of a complete board.
We will look at a CPLD circuit at the end of tne next chapter.
76 Source: Xilinx Inc., reference XI3468
77 Glue logic is a special form of digital circuitry that allows different types of logic devices or circuits to work
together by acting as an interface between them. These include address decoding, peripheral interfacing, circuit
protection against tSD or tMP events, and the prevention of unauthorized cloning or reverse engineering by
hieing the actual function ot a circuit.
Deciphering Schematics
77
ChaptHi 3
Processors and Controllers
Traditionally. processors are classified as either CISC or RISC type architecture. These days,
modern processor chips have a blend ot both to take advantage of their combined attributes
so it’s becoming harder to differentiate which camp they belong. In today s context, processors
are grouped based on the following primary features:
•	CISC (Complex Instruction Set Computer)
These processors execute complex instruction sets, requiring fewer instructions per
program. This means less RArf memory and general purpose registers are needed.
However, each instruction requires extra clock cycles tc process and thus potentially
slows crown processing speed.78
	RISC (Reduced Instiuction Set Computer)
These processors run simple instruction sets and use a pipelining technique to execute
multiole instructions concurrently, reducing the time taken to precess but requiring
more instructions per prog'am than CISC. RISC processors have more registers thus
allowing less interaction with memoiy for processing. However more RaM is requited
for storing assemoly-ievel instructions. More work is also put on the compiler to break
down hign level programs into simple instructions.79
•	ASIC (Application Specific Integrated Circuit)
ASIC processors are usually smaller, use less power and process at higher speeds.
However, as customized chips, they are designed from the ground up and cost more
78 CISC was one of the first architectures of microprocessors and focuses primarily on hardware capabilities.
They are commonly used in general purpose computers.
79 RISC processors were designed to overcome the disadvantages of CISC and focus on software capabilities.
Smart phones and tablets often utilize RISC processors.
/8
DIGITAL CIRCUITS
Elements of Digital Circuits
than general purpose processors. Semi-custom ASIC processors do exist where the
basics are already built, but they are less powerful.80
	SSP (Superscalar Piocessor)
Like RISC, superscalar processors can process multiple instructions at once through
pipelining. They are sometimes referred to as 'next generation RISC. However, they
are not standalone processors and are frequently used as co-processors tor arithmetic
processing and as multipliers to speed up computing.81
	DSP (Digital Signal Processor)
These processors encode and decode real world inputs Нке vioeo. audio, temperature
and pressure from analog signals to digital and vice versa via mathematical functions.
Like supe-scalar processors, DSPs are small, fast and low in power consumption.82
There are other special function processor types tnat have veiy specific working operations,
such as the symbolic processors, bit slice processo*s, transputers and the more well-known
graphic processors (GPU) of the gaming landscape The purpose built architecture of GPUs is
designed to onload graphic-intensive calculations from the CPJ.83 These single instruction
multiple data’ (SIMD) processors are suited for crunching large chunKS of data input, whereas
CpUs excel at complex operations on much smaller input streams.
Despite their variants processor and controller circuits are not that difficult to figure out aue
to their common features (memories, peripnerais. interfaces, etc.). How they are connected,
though, will depend on their structures. In general, most processors are either of the von
Neumann or Harvard architecture. An improved version of tne Harvard design which adds an
instruction cache ano dedicated I/O controller is aptly named ’Super Harvard Architecture
(SHARC). M₽Us tend towards the von Neumann structure whereas MCUs favor the Harvard
construct.84 DSPs, by reason of their design ourpose. are based on the SHARC model Refer
overleaf for a pictorial comparison of these three architectures, as well as pinouts of sample
orocessor ICs.
80 Mixed signal ASiC designs can incorporate analogue (including RFi and logic functions and are particularly
useful in system on chip iSoC) solutions.
81 Due to their number crunching prowess ano supportive role nature, these co-processors are found in large
arrays inside supercomputers like the Cray and IBM s Deep Вше systems.
82 DSPs find widespread applications in radars sonars, home theatres. TV set-top boxes and mobile phones.
83 Nvidia ano Radeon are two major manufacturers of GPU chips. Competitions between these players are fierce
as they vie for dominance not only in the games arena but also the ove'all processor industry. As of this writing,
Nvidia is in the process of acquiring ARM while other CPU такеге are considering jumping on to the RISC-V
bandwagon.
84 There is a misconception tnat MCUs are used in embedded systems whereas MPUs are suited for computer
systems. Embedded systems are generally more basic and rudimentary than microcontrollers since they often
do not have logic of their own to run the system, though at the heart of most embedded systems there is a MCU
or MPU running the application.
Deciphering Schematics
79
Chapter 3

А-bus
Instructions
and Data
D-Bus
CPU
Program
Memory
Instructions
only
Von Neumann (Memory)
Harvard (Program + Dara memory)
Super Harvard (SHARC)
(plus Instruction Cache + I/O Controller)
I/O
Controller
Data
Typical MPU and MCU Architectures
PM A-bus
Program
Memory
PM Data
Address
Generator
DM Data
Address
Generator
DM A-bus

Program Sequencer
Data
Memory
Instructions
and
Secondary
Data
Data only
PM D-bus
I Data _____________
Register
Instruction Cache
DM D-bus
High Speed I/O
(Senal, Parallel,
ADC, DAC, etc.)
Controller
(DMA)
DSP SHARC Architecture
80
DIGITAL CIRCUITS
Elements of Digital Circuits
АП 1 Г Al 2 2 Al 3 3 2 Al 4 4 £ AI5 5 [ CLK 6 £ 04 7 £ 03 8 E 05 9 L об те[2 +5V 11 Q 02 1 2 Г 07 13 £ 00 14 £ 01 15(2 INT 16E NM1 17 E HALT 18 |2 l-REQ 19 IRQ 20 2					|40 Al 0	P1 .0	1	Г | 39 A9	PI . 1	2	[_ J 38 A8	PI .2	3	| 2137 A7	P1.3	4	2 1 36 A6	P1.4	5	[ | 35 A5	P1.5	6	[ 2I 34 A4	P1.6	7	[“ 2|33 A3	P1.7	8	| 132 A2	RST	9	[7 2|31 Al	RXD/P3.0	10	[_ "| 30 A0	TXD/P3.1	11	L |29 GND	INT0/P3.2	12 ' |28 RFSH	INT1/P3.3	13[ _| 27 Ml	T0/P3.4	14[ 21 26 RST	T1/P3.5	15[ 2| 25 BRQ	WR/P3.6	16	2 21 24 WAIT	RD/P3.7	17	Q 21 23 BACK	XTAL2	18 I | 22 WR	XTAL1	19	2 21 21 RD	GND	20	2	о	2 40 VCC 39 P0.0/AD0 38 P0.1/AD1 2 37 P0.2/AD2 2 36 P0.3/AD3 21 35 P0.4/AD4 34 P0.5/AD5 33 P0.6/AD6 32 P0.7/AD7 31 EA/VPP 2 30 ALE/PROG 229 PSEN "| 28 P2.7/A15 27 P2.6/A14 2 26 P2.5/A13 25 P2.4/A12 24 P2.3/A11 2 23 P2.2/A10 22 P2.1/A9 21 P2.0/A8
							
							
Z30 MPU				3051 MCU			
		/	о		
GND	103		j 60	D2
DI 9	11 [		59	DI
D20	12		[58	D0
D21	13 E		57	VDD
D22	143		56	SCLK
D23	15[		Li 55	FI
VDD	16 L		J 54	1RQ0
MMAP SR	173 18	ADSP2105	J 53 52	IRQ1 FO
IRQ2	19LI	DSP	l;51	NC
RST	20 J		3 50	NC
A0	21 [		J 49	GND
Al	22 3		; 48	NC
A2	23 3		]47	NC
A3	24 [		3 46	NC
A4	25 3		[ 45	RD
VDD	26 3		44	WR
Deciphering Sctiematics
81
Chapter 3
Serial Buses“5
Just like chocolates and ice-creams, serial buses come in many different flavois these days
and are gaining widespread use in computers and embedded systems.85 86 What differentiates
and governs tne implementation of these serial communication is a set of protocols defining
the^r designs and applications. Generally, serial buses are broadly grouped under two types
ol protocols:
Serial communication is a bitwise data transmission mode between a sender and a receiver.
Depending on the relationship between these two parties or devices, it can ooerate under the
following mooes:
	Simplex. This is a one way communication technioue. The sender transmits data while
the receiver can only accept the data. TV and radio are two such examples.
	Haif-dupiex. This is a partial two-way communication. The sender and receiver can be
active but not at tne same time. Eacn takes turn to transmit 01 receive data and vice
versa. An example is the internet in which a user sends a request for information and
gets it from a server.
	Full-duplex. This is a simultaneous two-way communication. Both sender and receiver
can transmit and receive data from each other at the same time. A well-known example
is. of course, the mobile pnone.
85 A serial bus differs from a serial port. Although botn employ serial transmission, a serial port connects the
computer to one device, whereas a serial bus allows for the connection of multiple devices
86 Serial ouses are preferred over parallel buses for obvious reasons—simplicity and ease of implementation.
Speed is no longer a distinction with higher clock rates and better chip designs, though legacy parallel buses
such as the Centronics and SCSI interfaces may still linger around for a while. Even the once common printer
parallel port has been replaced by the versatile USB interface.
82
DIGITAL CIRCUITS
Elements of Digital Circuits
Apart from the mode ot communication there are other parameters that must be established
to ensure data transmission integrity and reliability:
•	Baud rate. The speed at which data is transmitted (1200, 2400...115200, etc.).
	Framing. The number of data bits per transmission (5, 6. 7 or 8 bits).
	Synchronization. The start/stop bits tnat identify a data frame.
	Error Control. An extra parity bit (odd/even) tor error checKing and data validation.
Witn this in mind, we will then nave a better understanding of the dynamics and differences
that constitute the two types of senal communication protocols.
As the name implies, synchronous data transmission protocois rely on a dedicated clock line
that is dlsimct from the data line to maintain data synchronization between the sender and
the receiver. No start/stop bit or error checking is thus necessary in this point-to-point type
communication. Examples are the SIO, SPI, I2C and USB buses
TX		RX
CLOCK		к	CLOCK
DATA		*	DATA
0x53 = ASCII 'S'
An external clock line is needed in synchronous communication
Asynchronous data transmission protocols are mainly found in long distance communications
in which minimal electrical wiring is desired. Witnout a clock line additional parameters must
oe built into lhe data that is transmitted for data flow control, error checking, and baud rate
matching. Botn sender and receiver have tnen own independent clocks which, although not
synchiomzed, must operate at the same baud rate to ensure correct encoding (transmitting)
and decoding (receiving) of tne data.
IX
DATA
RX
>1 DATA
START 01 234567 STOP
110 0 10 10
0x53 = ASCII 'S'
No external clock line s iequired .n asynchronous communication
Examples are the RS-232. RS-422 and RS-485 buses which we shall now discuss due to their
widespread use and popularity. This will be followed by the CAN, USB and Etne^MAC.
Deciphering Schematics
83
Chaptei 3
Here are the D39 female connector pinouts87 88 and a comparison table of their features and
differences:
RXD-
RS-422
GND
TXO+
SXfr.
4- — TXD-
*'o
Port Name-	RS-232	RS-422	RS-465
Transfer Type-	Full-duplex	Full-duplex	Halt-duplex (2-wire) Full-dupiex (4-wire)
Max Distance	15m @ 9660bps	l2G0m @ 9600bps	1200m @ 9660bps
Contacts	8 83	5	3
Topology	Pomt-io-Pomt	Point-to-Pomt	Multi-Point
Max Devices	1	1 (10 in Rx mode;	32 (256 with repeaters)
Tne RS-232 interface (TIA/E1A-232) is intended for data transfer Between the transmitter or
terminal (Data Terminal Equipment, DTE) and tire receiver or communication equipment (Data
Communications Equipment, DCE) in a point-to-oointscneme. Data on rhe RS-232 bus is sent
and received via single-ended lines (TXD and RxD with reference to GND).
Tne RS-422 interface is similar to tne RS-232 out uses differential signal lines i.e., four wires
for data transfers (one twisted pair for transmission and another twisted par toi receiving)
and one common GND wire Noise immunity is good which permits a much longer distance
between the transmitter and receiver.
The RS-485 interface is similar to the RS-422 in that it also uses differential signal lines for
data transfers However, it can operate in half and full duplex modes and allows several
receiver's and transmitters to oe connected via a multi point topology.
87 They also come in the legacy DB25 connectors as well as the Rj45 LAN type cables for long Distance serial
communication purposes.
88 For the RS-232 interface, it is not necessary to use all the contact lines. Typically, only the TXD. RXD ano GND
ground lines are used; the remaining lines are mainly for controlling the data flow.
84
DIGITAL CIRCUITS
Elements of Digital Circuits
Examples of RS-232 end RS-422/RS-485 transceivers are illustrated in the Maxim s datasheet
application notes below:89
RS-232 application
RS-422/RS-485 application
Deciphering these serial communication interfaces is quite straignt'orward —you only need
to identify the transceiver ICs and in the case of the RS-422/RS- 485, icok out for the matching
resistors at both ends of tne differential lines. The story, however, doesn’t eno here.
89 Texas Instruments is another supplier" with the popular AM26LS3x series of transceivers.
Deciphering Schematics
85
Chaptei 3
transceivers are basically voltage translators and aiso single-ended to differential and vice
versa signal converters for the RS-422/RS-485. A peripheral chip known as an PART (Universal
Asynchronous Receiver/Transmitter) is requirea to encode the data for transmission at the
sender side and decode to restore the data at the receiver side. An example is the 8251A30
orogrammable communications interface IC
D2	1 c	О		28	DI	Pin	Description
03	21			27	D0		—
RxD	3 1			26	vcc	TxC	Transmit Clock
GND	4 '			25	RxC	TxD	Transmit Data
04	5 C			24	DTR	RxC	Receive Clock
05	6 Г		г	23	RTS	RxD	Receive Data
Ob	7 L			22	DSR	TxRDY	Transmit Readv
07	8 L			21	RST	RxRDY	Receive Ready
TxC	9 E			2И	CLK	DSR	Data Set Ready
WR	10 [			14	TxD	DTR	Data Terminal Ready
CS	и |			18	TxEMPTY	SYNDET	Synchionous Detect
C/D	1 2 |			17	CTS	RTS	Request to Send Data
RD	131			16	SYNDET	CTS	Clear to Send Data
RxRDY	14|			15	TxRDY	TxEMPTY	Transmit Buffer Empty
8251A Pmout
Communication Related Signals
External penpberal USART Chios are easy to identify. These days, microcontrollers are built with
more supporting features besices ROM, RAM timers and GPIOs. The PSoC90 91 series of MCUs from
several manufacturers show just how versatile MCUs can be with their wide array of in built
functions.
CC2650 SoC	
Main CPU ARM Cortex- М3	RF core ARM Cortex-MlJ
UART 10 GPIOs 4 x 32-bit Timers Real Time Clock	Sensor Controller 12-bit ADC
90 This is a 28-pm LSART that supports both synchronous and asynchronous communications, replacing the now
defunct 40-pin 8250 and 16450 UART chips.
91 Programmable System on a Chip
86
DIGITAL CIRCUITS
Elements of Digital Circuits
No CAN Do!
The Controller Area Network (CAN) bus is another form ot asynchronous serial communication
protocol which finds widespread application in the automotive industry. Modern vehicles are
equipped with electronic control units (ECUs) and external communication devices, and these
are connected in a network using tne CAN bus.
A modern car may nave up to 70 ECUs (engine control unit, airbags audio system etc.) ana
eacn of them may have information that needs to oe shared with otner pads of the network.
The CAN bus system enables each ECU to communicate with all otner ECUs without complex
dedicated winng. The Can bus standard is used in practically ail vehicles and many machines
due to below key benef ts:
	ECUs communicate via a single CAN system instead of via airect complex analogue
signal lines, reducing errors, weight, wiring ana costs.
	Provides a single point-of-entry to communicate with all network ECUs, enabling central
diagnostics, data logg.ng ana configuration.
	Robust towards electric disturoances and electromagnetic interference and is ideal for
safety critical applications fvehicles, industrial automation machines, etc ).
	Uses CAN frames that prioritized by IDs so that top priority data gets immediate bus
access, without causing interruption io oilier frames.
Deciphering Schematics
87
Chapter 3
The CAN bus uses a message based protocol. Below is a standard CAN frame with 11 bits
identifier (CAN 2.0A), which is the type used in most cars today:92
Control
CRC
EOF
SOF	RTR
0-64
Data
ACK
Standard CAN Frame
CAN bus utilizes an inverted form of logic with two states—dominant and recessive. Figure
above illustrates a simplified input-output diagiam of a CaN transceiver pair with bit stream
going to/from a CAN controller and/or microcontroller. When the controller sends a stream of
nits these are framed and placed on the paired lines.93 Each CAN device must monitor both
what is currently on the bus and what it’s sending. Both ends of a CaN bus must be terminated
since any node on the bus may transmit data.94
Implementing the CAN bus interface requires two components: a CAN Controller IC and a CAN
Transceiver chip. Several candidates are available but we will consider just one exampie from
Microchip—the MCP2515 (controller) and the MCP2551 (transceiver). Pmoutsfor both ICs are
shown overleaf.
92 The extended 29-bit identifier frame (CAN 2.0B; is identical except the longer ID. It is used in the J1939
protocol for heavy-duty vehicles.
93 CANL is always the complement of CANH
94 Each end of the link has a termination resistor equal to the characteristic impedance ot the cable. Typical
value for the termination resistors is 120 ohms. There should be no more than two terminating resistors in the
network since any additional termination places extra load on the drivers.
88
DIGITAL CIRCUITS
Elements of Digital Circuits
TXCAN 1 [		118 VDD
RXCaN 2 [		“| 1 7 RESET
CLKOUT 3 [		116 CS
Tx0RTS 4 [	-	15 SO
		
TxIRTS 5 [	' ।	14 SI
		
TX2RTS 6 [	о	, 13 SCK
		
OSC2 7 [	*	|12 INI
OSC1 8 [		Zl 11 RX0BF
VSS 9 [		J10 RX1BF
CAN Controller IC
TXD 1 [	«	:i 8 RS
VSS 2 L		] 7 CaNH
VDD 3 [		] 6 CANL
RXD 4 [		5 VREF
MCP2551
* BOTH CHIPS available in
PDIP/SOIC PACKAGES.
CAN Transceiver
Figure below illustrates a simplified CAN bus moaule circuit. It includes the MCP2515 CAN
Controller which handles the logic responsible for managing the Can dus and an interface for
connect.ngto its associated MCU, and also the MCP2551 Can Transceiver95 which converts the
digital data to a differential form used on the CAN bus wires.
VCc b1
VDD
RESET1
INI
SCK
SI
SC
CS
TX0RTS
TX1RTS
TX2RTS
OSC2 RXOBF
OSC1 RX1BF
GND
TXCAN
RXCaN
CLKOUT
J2
' TXD
4 RXD
8 RS5
* -2 VSS
MCP2
VCC
MCP2515
jj
10
1. U1 RESET PIN CAN BE PULLED
HIGH VIA A 10K RESISTOR.
2. U2 RS PIN CAN BE PULLED
LOV' VIA A 10K RESISTOR.
1
2
3
Deciphering the CAN bus interface is quite similar to tnat of the RS- 422/RS- 485 due to their
use of differential line transceivers and termination.
95 A popular alternative to the MCP2551 is the pin compatible TJA1050 from NXP Semiconductors.
Deciphering Schematics
89
ChaptRi 3
Universal Serial Bus (USB)
The Universal Sena! Bus is host controlled. There
can only be ore host per bus; however, up to 127
devices can be connected to any one USB bus at
any given time. The USB host is responsible for
undertaking all the transactions and scheduling
bandwidth. Data can be sent using one of four
defined transfer methoas via a token-oasea
protocol.96 97 The standard connector uses four
shielded w.res of which two are power-related
(+ 5V and GND) and tne remaining two are twisted
par differential data lines. The mini and micro
connectors have an additional line for ID mode
detect. USB uses an NRZI (Non Return to Zero
Invert) encoding scheme to send data with a
sync field to synchronize the separate host and
receiver clocks.37
4-PinType 5-PmTvpe
1 - VCC	1 - vcc
2 - D-	2 - D-
3 0+	3-0+
4-GND	4-ID
5-GND
4 3 2 1
Type A
54321
Micro-A
1 2
4 3
Type В
,54321
Mim-B
Micro-B
USB supports plug-n-play’ with dynamically loadable and unloadabie drivers. The user simply
hot plugs the device into the bus and the host will detect and interrogate the newly inserted
device, load the appiopriate driver and the device will be ready to communicate with the nost.
Unlike the RS-232 and similar serial interfaces where the format of aata being sent is not
defined. USB s made up of several layers of piotocols.98
USB has tour different packet types:
TOKEN
DATA :
HANDSHAKE :
SOF
CRC5 | | ГО
CRC16'|
crc5'i fa*-
Legend: SOF: Start ot Frame PID: Packet ID
CRC: Cyclic Redundancy Check (5/16 bits)
ENDP: End Point
EOP End of Packet
90 The USB specification defines four endpoint transfer types—control, interrupt, isochronous ano bulk.
97 There is a constant debate as to whether USB is asynchronous or synchronous. If we define synchronous to
mean it necessitates a clock line, then USB is clearly asynchronous.
98 Fortunately, most JSB controller functions handle the low-level USB protocols up to the transaction layer, so
we neec. not concern ourselves with such complexity.
90
DIGITAL CIRCUITS
Elements of Digital Circuits
The following table shows the possible values tor the Packet ID types:
Group	PlD Value I	Packet Identifier
Token	0001	OLTToken
	1001	IN Token
	0101	SOF Token
	1101	SETUP Token
Data	0011	DAT AO
	1011	DATA1
	0111	DATA2
	1111	MDATA
Handshake	0010	ACK Handshake
	1010	NAK Handshake
	1110	STALL Handshake
	0110	NYET (No Response Yet)
Spec.al	1100	PREamble
	1101	ERR
	1000	Split
	6100	Ping
Figure below illustrates a simple design that interfaces a P1C16p877P microcontroller to the
USB bus us'iig the FTDI FT245BM USB FIFO chip which handles the details of communicating
via tne USB bus. All that is required is a 1Kbit serial EEPROP to supply the USB configuration
information.
Note that because the USB is so versatile, there are many adapters that translate USB to RS232,
SPI and CaN .nterfaces, etc.
Deciphering Schematics
91
ChaptHi 3
Ether net = Ethei MAC"
The last asynchronous serial communication protocol we want to look at is the Ethernet Media
Access Control, or EtherMAC in short. The ethernet can be mainly divided into tour hierarchical
layers—physical, data link, network, and the upper layers. EtherMAC handles the lowest two
layers, which are the phys.cal and data link. An ethernet cable has eight wires of which four
are used—a twisted parr for output data and another for input data. There are no clock lines
so the ethernet is essentially an asynchronous interface. However, it’s not easy to describe its
full functionality because *he interface nas a very complicated structure.
T568A STANDARD WIRING
TX-
RXt
RX-
TX+
SWITCH/
ROUTER
PAIR-2
PAIR-3I—, PAIR-4
RI45
Ethernet was built for ail devices on a network that uses a
shared communication channel. Tne primary problem with
us ng a shared connection is ensuring an orderly traffic
when an entire network of devices wants to constantly
transmit data over that same channel. The solution is to
sense node activities and wait until the channel is free
while using collision detection99 100 to minimize the amount
of traffic on the network.
When a device or node on the network wants to sena data
to another none, it senses for any existing traffic on the
channel, wnich is the ma.n wire connecting all the devices,
if it is free (no one is sending anything) it sends the data
packet on tne network to ail connected devices wnicn then
check the packet to see whether they are tne recipient. If
there is already a packet on tne channel, the device that
wants to send will have to wait for a small amount of time
before trying aga n. This is the best arbitration method in a
system without master-slave tier to share communication
responsibility.
In a modern ethernet network, devices do not typically use the same communication channel.
Instead, each device nas a private cable that is connected to tne network through an ethernet
switch. In this topology, the only communication channel fora device is between 1he node and
the switch, meaning that collisions are only possible if a device ano the switch attempt to
cornmun.cate with each otnei at the same time.101
99 Ethernet is a technology developed at Xcro> PARC between 1973-1974 to support local area networking. It
has since been expanded to include a whole family of technologies that support various network architectures
and topologies as part of the IEEE 802.3 working group dedicated to support networking using pnysical wired
connections.
100 The exact method of detecting collisions depends on the physical media being used.
101 In addition, the full duplex ethernet standards completely separate the transmit and receive channels so that
they can run simultaneously. Thus, combining full duplex standards with a switching topology means modern
ethernet networks can be completely collision free.
92
DIGITAL CIRCUITS
Elements of Digital Circuits
Again, to decipher an ethernet schema, we need to identify its primary component, namely
the ethernet controller. The controller can be a separate entity or embedded within the host
MCU, as illustrated below;
A cross section of the RJ45 connector and its accompanying internal schematic diagram is
depicted below. The UTP side interfaces to an RJ45 cable while the CHIP side is linked to the
ethernet controller IC:102
(Front View)
RJ45 Internal Schematic
RI4t> Connector
We shall now look at the three synchronous serial communication protocols.
102 There are many chip manufacturers who make and supply variants of such ICs; Microchip, Broadcom, Intel
and Texas Instruments are among the most popular.
Deciphering Schematics
93
ChaptHi 3
Serial Input Output ISIO)
This is by farthe simplest and most basic form ot synchronized serial communication protocol
which uses a one-to-one connection between a mastei and a slave. Oniy two lines are needed
—data and clock. The master issues the clock to the slave tor both sending and receiving
data In other words, the master is the one initiating data transfer on every transition of the
clock signal.
Because the oata transfer direction is pre-aefined,103 this form of serial I/O communication
is usually founa in straightforward applications with specific functions. An example is an MCU
interfacing to a digital temperature sensor:
(Top View)
DATA	О	Zi VDD
SCLK nd		=TI CS
NC □=		JI NC
VSS Cl		ZTI NC
TC77 PINOUT
Temperature data is converted from the interna! thermal sensing element and made available
as a 13-bit two’s compliment word (12-bit plus sign and temperature resolution of 0.0625 °C).
Chip select is optional and can be omitted if IC77 is the only device
103 Other serial protocols are preferred for bi-directional data transfers.
94
DIGITAL CIRCUITS
Elements of Digital Circuits
Serial Peripheral Interface (SRI)
The SPI is a single master communication protocol, that is, one mastei device initiates all the
communications with its slaves. When the SPI master wishes to send data to a slave and/or
request information from it, it selects that device by pulling its SS (Slave Select) line low and
activates the clock signal (SCLK) at a frequency common to both the master and the slave.104
The master sends out data from its MOST (Master Out Slave In) line wnile it receives data at its
MISO (Master In Slave Out) line.
Four communication modes are available (Mode 0-3) that basically aefine the SCLk edge on
which tne MOSI line toggles, the SCLK edge on which the master samples tne MISO line and the
SCLK signal steady level (that is tne clock level, high or low, wnen tne dock is not active). Eacn
mode is formally defined with a pair of parameters called clock polarity (CPOL) and ’clock
phase (CPHA).
104 SPI does not care about the physical interface characteristics like the signal voltages and standara used
between the devices. Initially, most SPI implementation used a non-continuous clock and byte-by-oyte scheme.
Many variants of the protoco" now exist that use a continuous clock signal and an arbitrary transfer length.
Deciphering Schematics
9b
ChaptRi 3
’I—:---Toggling Edge
*1— Samp] ing Edge
MODE
MODE
MODE
MODE
CPOL-0 SCLK IDLE
CPHA-0 @ LEVEL 0
CPOL-O SCLK IDLE
CPHA=1 @ LEVEL 0
CPOL-1 SCLK IDLE
CPHA=0 @ LEVEL 1
CPOL-1 SCLK IDLE
CPHA=1 @ LEVEL 1
A mastei/slave pair must use a similar set of SCLK parameters (frequency, polarity ana phase)
for communication to be possible. If multiple slaves are used with oifferent configurations, tne
mastei will have to reconfigure itself eacn time it wants to communicate with a specific slave.
This is basically all that is defined for the SPI protocol.
An interesting and modern application can be found in the circuit notes of Analog Devices’
ADXl345 3-axis accelerometer chip, which is suited for mobile device oesjgns. The circuit
illustrates an ADuC7024 precision analog microcontroller used in conjunction with the aDXL345
in an SPI configuration is toggleo to signify the beginning and ena of each transmission.105
Tne chip select pin is toggled low to signify the beginning and end of each transmission. When
it is driven h.gn, this inoicates that no SPI transmission is occurring.
SCK
ADUC7024 /CC \ D1 О			ADXL345	VDD CS ( 7)	GND SCK (14)	NC SDA (13) SDO (12)	GND IRQ0 ( 8)	GND IRQ1 ( 9)	VS	|'ljj • Э :		•		13 \ 1 5 i	SDA SDG NC NC INT2 INT1
) Г I . Z (SCLK) Pl.3 (MOSI) PI.4 (MISO) PI.5	* i<		1 — —		| з i И i ] 4 J	10 i 5	Г 9 I				
IRQ1		—		6	-J			
CS
Tne cnip select pin on the ADXL345 is used to select the desirea interface. When it is pulled
nigh, the chip operates in the I2C mode, which we will discuss next.
105 Both devices are I2C and SPI ready.
96
DIGITAL CIRCUITS
Elements of Digital Circuits
Inter-Integrated Circuit (120)
BUS
I2C is a multi-master protocol that uses two signal lines—serial
data (SDA) and serial clock (SCL). I\o chip selector arbitration logic
is reauired. Virtually any number of slaves and masters can be
connected onto these two signal lines to communicate with each
other using a protocol that defines:106
•	a 7-bit unioue address
•	8-bit data bytes
•	control bits for signifying the start, end and direction of
communication
	an acknowledgment mechanism
Physically, the I2C bus consists of two active wires—SDa ana SCL, and a grouna connection.
Both active wires are bi-directional. The I2C piotocol specifies the device that initiates a data
transfer on tne bus is considered tne Bus Master and consequently all other devices are Bus
Slaves at that point in time.
At tne physical layer, both SCL and SDA Imes are open-dram with pull-up resistors. Such a
scheme is aevised to achieve the multi-maste' structure. All output from the interfaces are
eithei '0 or High-Z state, and the data and clock’s high level are governed by pull-up elements
on the lines (wired-AND structure). Since data '0 is stronger than data 'Г in a wired-AND
connection, if two masters output ’0’ and '1 (High-Z state) respectively, then tne SDA line
becomes a '0'. This strength priority realizes an arbitration to prevent data collision in a multi-
mastei system.107
106 Additionally, I2C has some advanced features, like extended bus addressing, cIock stretching and the very
specific 3.4 Mbps high speed mode.
107 A master that loses arbitration on the I2C bus will stop accessing the bus. In most cases, it will simply delay
and try again later.
Deciphering Schematics
97
ChaptHi 3
The following examples illustrate the transactions that occur between a master and a slave
for a clearer picture than words can convey:
START	Slave Acdiess	Rd/nWr	ACK	Data	ACK	Data	ACK	STOP
1	7	1	1	8	1	8	1	1
A Master (shaoed) writing two bytes to a Slave
START	Slave Addiess	Rd/nWr	ACK	Data	ACK	Data	ACK	STOP
1	7	1	1	8	1	8	1	1
A Master (shaded) reading two bytes horn a Slave
START and STOP are unique conditions on the bus that are closely dependent of the I2C bus
physical structure, Moreover, the I2C specification states that data may only change on the
SDA line it the SCI clock signal is at the low level- conversely, the data on the SDA line is
considered as stable when SCL is in the high state.
Let's revisit the aDuC7024 and ADXi_345 chips with ал T2C configuration:
I2C and SPI are small communication protocols compared to the Ethernet, USB, SATA and PCI-
Express that has throughput in excess of megabits if not gigabits per second. However we
need to know what each protocol is meant for. The Ethernet, USB and SATA are meant for
outs.de the box' communications and data exchanges between whole systems. When it
comes to implementing communication between integrated circuits such as a microcontroller
and a group oi relatively slow peripherals there is no reason to use excessively compiex
protocols. That is where the I2C and SPI perfectly fit the Dill.
98
DIGITAL CIRCUITS
Elements of Digital Circuits
Summary
Deciphering digital circuits is not really difficult if you bear the following points in mind;
	For processor-based designs, the CPU or controller chip is the main anchor by which
most of the circuit elements take mference from.108 Understanding the architectures
(see page 80) will give you an idea how the memory devices (ROM. RAK FLASH etc.) and
peripheral components (decoders, buffers, latches, PL Ds. etc.) are configured and
linked up to then host controllers.
	For discrete logic designs, these are usually made up of combinational/sequential logic
clusters which can be as simple as Boolean entities comprising basic logic gates, or as
comolex as state machines using programmable logic devices (PlDs, FPGas. etc.)109.
	Digital circuits may exhibit different operating logic voltage levels, depending on the
components employee (refer to page 47). This can be inferred by the presence of lDCs
and logic translation circuits.
	Pinouts and functional truth tables of digita1 ICs provide useful information and should
be referred to. if availaole.110 Besides power and grounomg, some configuration or
moce pins may be controlled, 01 tied to either hign or low. Signal pins may have one-
to one or one-to-many assignments; bi directional pms sucn as data buses usually
have testate connections.
	Open-collector gates are usually wired OR or else wired aND connecteo.
	It may oe necessary tc apply De Morgan s theorem to decipher certain discrete logic
compositions to make sense of their functions (see page 65).
•	Digital circuits normally exhibit clean and clear signal flow;111 by following point-to-
point whether singularly or as a group (address, data, etc.) you can more or less make
out their design schemas. However, ц can be challenging in cases with predominantly
la'ge PLDs with unlabeled inpub'output p,ns or cryptic signal names.112
108 There could oe ad hoc auxiliary circuits which provide extra peripheial suoport functions, but these snouldn t
be too difficult to differentiate as separate or standalone entities.
109 In some rare instance, the designer may include the schematic design files of the programmable devices as
supplement to the main circuit diagram. This will certainly be of great help though navigating in and out of mem
frequently may cause you to become disoriented and confused. For simpler PLDs, JEDEC oesign files may be
useful but not for the novice and uninitiated.
110 The same cannot be said of analog ICs which are denoted with generic signa, pin names. You're in luck if the
designer included function labels for demarcated clusters in his circuit diagram!
111 In contrast, analog designs are much harder to decipher because of the presence of feedback loops and
cascading stages.
112 Designs with. ASIC chips may aiso pose difficulties since datasheets and pinouts for these components are
usually unavailable. Black box designs, as I would call them, are the bane of digital circuits.
Deciphering Schematics
98
ChaptRi 3
That said, it is important to realize that a digital circuit may not necessar ily contain just purely
digital components.113 It would be ludicrous to think that digital circuits can exist in isolation
or find practical applications on their own in the real world which is intrinsically analog in
nature.114 We will look at one such circuit example in the next chapter.
113 A lot is dependent on the circuit designer to designate whether a circuit is digital or otherwise baseo on its
functionality, and the proportion of digital to non-digital elements present in the design.
114 The only exception I can think of, though, is a running matrix LED signage for simple alphanumeric display of
textual information.
10D
DIGITAL CIRCUITS
“1. Secipbiering (SiGjital Circmiba
Introduction
Digital circuits, due to their binary nature, are relatively easy to decipher. The Key to unlocking
their schematic diagrams is usually found in the digital devices tnemselves. By studying the
logic functions and truth tables of the component datasheets, it should not be too difficult to
figure out the interconnections that made up the circuit clusters. The possible trouble you may
run into are the combinational discrete’ gates and synchronous ICs that are cascaded in
stages.115
For our exercise, we will work on a 3-sheet schematic diagram which features a 'Payload
Command & Control Card' It is not entirely digital but don’t worry, we will focus only on the
digital pans as tnat is our primary objective.116 Take some time to study the three sneets of
circuit diagram presented in the following pages. Depending on your level of competence in
identifying the component symbols, you may be able to make out some er nearly all the
functionalities involved. But don t be discouraged if you fee1 overwhelmed and unsure where
to begin. It takes patience and practice to become proficient—ycu can't rush the process,
out you can shorten the learning cuive and derive some fun at the same time.
At present, you should already know how to recognize a good number of schematic symbols.
If not, Appendix A orovldes a detailed enough reference to get you started. Next, make a quick
mental note of the various ICs present on the schematic diagram.117 If you are a seasoneo
engineer, you should nave nc problem identifying common TTL chips by their part numbers,
and even some of the standard memory devices (EPROMs, RAMs, etc.). From experience, you
can probabiy figure cut what some ICs oo by their pin names despite their unfamiliar part
numbers. A good schematic diagram should contain helpful information (signal names, .auels,
ports, etc ) but this is not always the case. Theiefore, it is important to develop a systematic
approach when deciphering a circuit.
115 The more familiar you are with the various combinational circuits mentioneo in the previous chapter, the less
likely you will struggle to decipher such design implementations.
116 Bear in mind that digital circuits don’t exist in isolation in real world applications. Even a basic Arduino UNO
card contains some analog elements ano requires additional extension modules and sensors to interface to the
real world to be useful.
117 Discrete components like resistors, capacitors, diodes, transistors, etc. are a given as are simple logic gates
so these can be left out tor now.
Deciphering Schematics
101
Chapter 4
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102
DIGITAL CIRCUITS
Deciphering Digital Circuits
tMGhC. $0034728-01015 REV fl4 SHEET I 0F 3
c
Deciphering Schematics
’03
Chapter 4
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104
DIGITAL CIRCUITS
Deciphering Digital Circuits
PAYLOaD COMMAND 8 CONTROL CARP
ОКНО: 6003.4728-01015
RE* 04 SHEET 2 0F 3
Deciphering Schematics
10b
Chapter 4
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106
DIGITAL CIRCUITS
Deciphering Digital Circuits
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Deciphering Schematics
107
ChaptHi 4
Deciphering Steps
Steps to decipher a schematic diagram:
	Scan ana identify as many cncuit elements as possible
	Check oft tne obvious and standalone
	Link up interrelated components
	Work on tne familiar and straightforward
	Follow signal flow as closely as possible
	Decode and decipher in stages
Lei’s try to gather some data and familiarize ourselves with the schematic diagram. We will
scan each sheet and see how many items we can identify at first sight.
Sheet 1 of 3.
Decoupling capacitor panks for +5V and ±15V
Voltage converter (U61)
Optocoupler (033)
Power-on reset circuit (041 A)
M.crocontro.ler (01), memory devices (04-05, U44, U50), buffers <U2, U78)
Multip.exer (037), decoder (U6), uSaRT (U3)
Oscillator (U42), counters (U32, U39-U40. U43, 049}
Line drivers and receivers (034, 035)
Voltage comparators (038, 055)
DAC (046) and supporting circuits (047-048)
Sheet 2 of 3:
Mainly analog with three DACs (013, 022, 028)
Sheet 3 of 3:
Lots of op-amps (0P11) interfacing to analog multiplexer (018)
BIT ano ana.og signals (from Sheet 2) interfacing to analog multiplexer (019)
Sample and hold (09) to ADC (010)
Address decoder (07). data buffers (08, 029, 088)
T'ansistor array drivers (030, 089)
Programmable peripheral interface (031) for digital 1/0 ports
Did you manage to identify this much oi perhaps more? Well, don’t be overly concerned if you
could not. Since we re focus.ng on the digital aspect, we can skip almost all of Sheet 2 and
ever half ot Sheet 3 tor that matter.
108
DIGITAL CIRCUITS
Deciphering Digital Circuits
Power and References
Mow that we nave an overall idea of the scnematic oiagram, let's deal with the obvious and
standalone elements first. This would be the decoupling capacitors and power rails. We see
that there are two groups, namely the digital voltage (+5V) and GND, and the analog voltages
(±15V, +28V)and GNDA.
GO
C57
+SV
+SV
♦5V
* ALL DECOUPLING CAPACtrORS ARE 10BNF
16
67
65
122
-15V
*15V
•15V
GNDA
GNDA
-15V
-15V
-15V
•15V
c« 1 s.[ a _L -I gj а Л >.
<’U J dy 3 _ 3- u u
(«> (A) (*) (A)	<A>	(A) (A> (A)
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8 j	2i 7 si
(A)	(A)	(A)	(A)	(A)	(A)	(A)	<A)
-15V
cwl K1	S1 L	® —	4-L	ol C J—
4nj J T	T 7	“T	T	7 T
IA! (A,	<Aj <»>	(A)	(Al	(A) (Al
(A)	(A)	(A) IA) (A) (Al (A)
Notice that the digital and analog voltages have different
grounds (GND and GNDA). Digital circuits are noisy cue to their
high-speed switching; analog circuits on the other hand, are
sensitive to noise. Therefore, it is vital to separate these two
circuit types cn a PCB to prevent digital noise from corrupting
ana.og performance.118 A standalone element would be the
voltage converter (U61) which converts tne ±15V rail supp'ies
to a paii of precision ±1OV references for op-amps U57A and
U5 7B.
Tisv U61
-PS -H0V
57 *ADJ
-ISV— «-ADJ
-ps -,ov
-ADJ
-ADI
+ I«V
]-!0V
7
(A)
GND
VREI02H
14
*U38
8 = +5V 5 ’ MC
4 - DGND 6 - NC
1 - DGND
t(J55
8 = +15V 5 = NC
4 - -15V 6 = NC
1 = AGND
The +28V is solely used for operating the mechanical relay coils which are
driven by high-current sinking transistoi outputs from U30 and U89 While
we're on the topic of power rails. I d like to mention that sometimes you
may find helpful text references for certain ICs such as the lM1 11H (U38
ana U55) which have accompanying pinout labels placed near them.
Notice that they reference different grounds—do you know why?
(Answer overleaf)
118 That said, analog and digital grounds in a system must be joined at some point to allow signals to reference
to a common potential. This is carefully chosen so as not to introduce digital currents into the ground of the
analog portion of the system—usually at the power supply sides.
Deciphering Schematics
10a
ChaptHi 4
Reset and Watchdog
We know that this is an MCU-based design so there should be a power-on reset circuit near the
microcontroller U1, If we trace U1 s active high RST pin, it will lead us to a Schmitt trigger NAND
gate U41A which is driven by an RC circuit. R118 and C86. across tne +5V. On power up, C8b will
hold Ill's RST pn high until it is fully charged. The reset duration should be sufficient to
initialize the MCU before it is released to begin operat on.
But wait, there's more. Input pin 2 of U41A is driven by
another Senmitt NanD gate U41R with two signals, wD1
and WD2. What are ihev? Any well-designeo processor
board does not rely on just a power on reset to ensure
everything is working properly. What if there’s a glitch
and the processor hangs up? The power-on reset circuit
will not be able to do anything now. Enter the watchdog
timer or circuit.
A watchdog time1', also known as a computer operating properly (COP) timer, is an electronic
timer that is used to detect and recover from processor malfunctions. During normal operation
the processor would regularly reset tne watchdog tinier to prevent it from elapsing or timing
out. If the processor hangs and fails to dose the watchdog timer will reset the processor once
it time-out and jumps into action.
in this case, the watchdog circuit provides a secondary
reset as a back-up measure m the event the MCU fails to
reset upon start up. Counters U39 and U43 will be released
Rom their rcset-nolo states (U7.15) and clocked by a free-
running multivibrator circuit (U38.7) made up of a voltage
comparator U38 (l Mi 11H) ano an RC pair, R123 and C87. A
similar circuit example can be found in the ICs datasheet
under the application notes (left figure). Now you know why
U38 references DCND instead of ACND. (Answer)
110
DIGITAL CIRCUITS
Deciphering Digital Circuits
MCU and Memories
The design is based on an 8032 microcontroller supported by a 64Kbit static RAM and runs its
operating program from a 512K-bit E^ROM. The MCU uses a multiplexed address-data bus ADO-
ADZ for one of its ports and hence cannot be connected directly to either the address or data
□us of any memory or I/C devices. The usual desigr practice is to implement an adcress latch
cont'olled by its AlE signal pin. and a bi-directional data register controllea by its PSEN and RD
or WR signal pms.
VI-12 u^Z
C2.C3-22PF
*5V U1	U2	U4	U78
ICTAL 1
CTAL2
ADC
ADI
AD?
ADJ
AD4
ADS
ADE
AD?
A9
AID
All
A12
А1Э
A14
A15
ALE
P5EN
RD
ADCfl EM
DATA
HD8OC32-12
The address and data latches are
controlled by two external enable
signals from J1.
1ОГ7164
54HCM
U1 has an inverting oscillator amplifier which buffers the external crystal excitation to anve its
internal clock generator circuit. Being a ROM-less version of the 80bx MCU family, it requires an
external EPROM (U4) to run its operating program, and an additional RAM storage (U5) to
supplement its tiny internal scratch pad (256 bytes).119 Address decoder (U6) determines the
devices selected by the MCU for the required functionality or data manipulation.
119 The external access enable (EAr pin is tied low to fetch code from external memory locat'ons.
Deciphering Schematics
111
ChaptHi 4
Address Decoders
If you’ve been observant enough, you’d notice that there are two 3-to-8 decoders present on
Sheet 1 (U6) ana Sheet 3 (U7), respectively. These chips provide address decoding for the MCU
to select the devices it wishes to interact with, by:
•	Enabling the chip select for USART and RAM (U3, U5)
•	Removing the reset or clear on counters (U39-U40)
	Performing a single write operation on DaCs (U13. U22. U28j
	Piovidmg a cIock pulse for data latches (U8, U29, u88)
Here are the two address decodeis:120
5
Ala—±
PSEN---
A12-----
A13----1
A14----i
AO	06
Al	04
A2	03
	02
ЁТ E3	
	oi
Ё2	00
54HC138
1,3"
“----Ulo3
U77B
U5.20
14
J5
54HCQ8
ties 11
U13.17
U2911
U8.11
1122.10
U28 13
U36 3
Readers may wonder how the MCU's 16-bit adoress is able to reference all the EPROM s 64K
locations and still handle additional resources such as RAM memory ano other oenpherals.
The answer lies in the MCU’s Harvard architecture wmch uses separate program and data
memories by means of the PSEN signal giving it two 64K addressing space. When PSEN is low.
decoder U6 is disaoled and the MCU is accessing program code from the EPROM: when PSEN
becomes high, U6 is enabled and rhe MCu now accesses a different memory space, as shown
in the table summary below:
U6 Address Decodmg Truth-Table
A14	A13	Al 2	IC	Device	Signal
0	0	0/1	U5	RAM	CS
0	1	0	U10	aDC	CS
0	1	1	U7	Decoder	EN
1	0	0	U31	PPI	CS
1	1	0	U3	USART	CS
* PSEN = 1,Al 5 = 0
120 Notice that U7 (slave) is cascaded ю UB (master).
112
DIGITAL CIRCUITS
Deciphering Digital Circuits
Similarly, for U7 (slave) decoder:
U7 Address Decoding Truth-Table
All	A10	A9	IC	Device	Signal
0	0	0	U36	Inverter	CLR / MR
0	0	1	U28	DAC	wR
0	1	0	U22	DAC	rtR
0	1	1	U8	Data Latch	CP
1	0	0	U29	Data Latch	CP
1	0	1	U13	DAC	WR
1	1	0	U88	Data Latch	CP
* PSEN = 1, a1 5 = 0, A14 = 0, Al 3 = 1, A12 = 1
From the two tables above, we see that U7 provides a subset addressing to extend the limn of
u6 decoder outputs.121 An interest ng note is the use of an AND gate for the RAM memory chip
select, whicn uses two of U6’s outputs. This is a workaround since address line л 12 is involved
in US's decoding input to access tne whole 3,192 locations of U5, when A13 and A14 are both
low.
Aodress decoding is not limiteo to block decoding technioue using logic ICs like the 54HC138.
For simple CPU designs involving small memories, linear decoding (direct addressing) using
the higher address lines as chip select can be implemented with minimal hardware. For large
memory systems, absolute aecodmgis preferrea using gated hign address lines as chip select
signals. In complex designs involving different memory and peripheral devices, the 3-mput
limit ot the 54HC138 decoder can be circumvented using a programmable icgic device (PLD),
as shown in the example below.
+5V
EQUATIONS: Al 9 		 СЕ	= A19 * A18 * A17 * #A16 * #A15 * #A14 Al 8 - 3 DLART - AIS * A18 * A17 * #A16 * #A15 * Al4 A17 4 WAIT7 = AI9 * AI8 * A17 * «16 * A15 * #A14	A16	c A1 5 	— hAIT4 = AI9 * A18 * A17 * #A16 * Al 5 * A14	„	6 Al 4 	 WAIT1 = Al 9 * Al 8 * Al 7 * A16 * #A15 * #A14	7 EPROM = AI9 * AI8 * A17 * A16 * #a15 * Al4	x 8 RaM = A19 * AI8 * a17 * А16 * A15 * #a14 10		—
	Il	VCC 12	08 13	07 14 oo 06 15 to 05 16 5 34 17 e 03 18	02 19	01	20
		— SCOM — RAM - EPROM —— WAIT] — WAIT4 WAIT7 —— DUART — CE 11
SCOM = Al9 * Al8 * Al7 * Alb* Al5 * Al4		
121 This is a common practice and is not necessarily limited to just one slave address decoder Careful planning
is required though to avoid possible addressing conflicts.
Deciphering Schematics
113
ChaptHi 4
USART and Serial Interfaces
The USART chip U3 provides a prog'ammable communication interface between the MCU and
the DCPA.122 It receives serial data from the DCPA via a differential receiver (U34D). converts it
into parallel data and then stores that data in its registers tor retrieval by the MCU to process
and perform the necessay ooeratiors. Similarly, it corvems parallel data from the MCU into
serial data to be sent out to the DCPA via a differential driver (U35C). The USaRT notifies the MCU
via its TXRDY and RXRDY signal lines.
U43 prov.des two types of clocks to the USART: an opeiating clock (1.2288MHz @ Q0A) and a
common transmit (TXC) ana receive (RXC) clock (30/.2KHz @ Q2A). Three aifferential serial
line123 receiver pairs are converted to single-ended TTL before routed through a multiplexer
(U37) to the MCU. Ar additional serial input is implemented via optocoupler U33 (6Ni 34) to
provide isolated line input with RC filter circuit to remove noise.
122 Digital Central Processing Assembly
123 These different ial line receivers (26..S33) as well as the differential line drivers (26LS31) are RS-422 serial types.
114
DIGITAL CIRCUITS
Deciphering Digital Circuits
Gyre Excitation Circuit
The gyro excitation circuit is an interesting example of a lookup taele waveform generation
circuit. The analog signals required for operating a gyro mechanism are produced by means
of digital method—free-running counters are used to repeatedly drive EPROMs to output pre-
defined digital data patterns. Tnese data patterns are then either fed to a DaC io generate a
digitized 19.2KHz sinusoidal wave as a gvro reference, or a 40Ohz two-phase (0 and 90 degrees)
square waves to operate a gyro motor.
Notice that the two EPROks have a single address oit each that is connected to a port pin of
the MCU (P1.2). The high address nits—a6 for U44 ano A7 for U50—alicw the MCU to select one
of two data patterns to be output from the EPROMs, either a sine or cosme reference from U44,
and an in-phase or out-of-pnase square wave from ut>0.124
Binary counter U43 repeatedly cycles through the 64 memory locations of U44 while U49 does
the same with 128 bytes for U50. U32 provides a 1.2KHz reference dock for the MCU s internal
counter, T0.
124 U50 has an additional high address bit (A8; connected to one of the port pin of the digital I/O ch p (U31). This
could be for extra control option. Note that the choice of a large EDROM <27С64) that's under-util zed seemed
wasteful, out from a design perspective it could have been due to unavailability of lower EPROM ICs or cost
consideration.
Deciphering Schematics
115
ChaptHi 4
Digital Input/Output Ports
Digital I/O pons are a convenient way to send individual bit command data or receive status
reporting data. The 8255 programmable peripheral interface is a versatile chip to implement
this scheme with its three 8-bit I/O ports.125
The two-bit address bus (A0-A1) selects the control register and three I/O po-ts for configuring
and controlling data bits flow. РоП A (PA0-PA7) and two bits of Port С (PC0-PC1) are used tc
monitor paired status data the rest of Port С (PC2-PC7) and two bits of Port в (PB0-PB1) serve
as paired control data outputs PBO PB' drives a boresight motor via a driver amplifier circuit.
PB2 likely provides extra selection of different page map for the pattern EPROM U50 The rest of
Port в are unused.
125 These I/O ports can be configured for three different mooes of operation—basic input/output (none 0),
strobed input/output (mode 1). or bi-directional bus (mode 2). Mode 0 is used for this card.
116
DIGITAL CIRCUITS
Deciphering Digital Circuits
Power Drive Ports
The power drive ports are a combination of data latches and Darlington transistor arrays. The
latches capture the MCU-aefined state of the relays (ON/OFF) whicn are then driven (energize/
deenergize; by the transistor ar'ays.
Four relays (K1-K2 driven by U30, K4-K5 driven
by U89) are located on this card (figure above)
while the rest ot the power arive outputs are
routed out to control relays m other cards.
It is common practice to employ open-col lector
type transistor airay to allow digital signals to
drive high power loads (left figure).
This concluoes the digital portions ot the ’Payload Command 8 Control Card’ Lets look at a
Cpl D Circuit to comp.ete this chapter.
Deciphering Schematics
117
Chaptnr 4
Deciphering a CPLD Circuit
REF Value
R1
R2
R3
R4
R5
Ro
R7
RS
R9
R10
R11
R12
fil 3
R14
R15
R16
R17
R18
RI9
R28
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
IK
IK
IK
IK
150
150
150
150
150
150
150
150
27K
IK
10K
IK
IK
IK
IK
IK
IK
IK
IK
IK
IK
100
100
1K5
1K5
IK
С1Я
+3V3
Y1
; -
1.8432
RH7
3
+3V3
T
32
21
41
5
17
30
15
15
IC1
VCC 10
vCCINT!
VCC1NT2
I0/GCK1
TCK
TDD
Г01
TMS
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
IU
100U
1U
I0UN
10ON
I00N
100N
22U
I00N
I00N
100N
+3V3
»3V3
8
C/3
TRIG
-ffiLr
RN2
10K
TC4
2
SW5
—’5
13
. 12
, 1|
, 10
___9
2 t-
6
4
1
5
3
- H <1 < *


в
SW4
€
7
r3V3
• rg3
GND
Q 3 CLK-LF •	R24
THR 6 • RT3
LM555N
v+ ‘
+3V3
—cv
—i-l OIS
6 • RT3
It
23
31
GND
GND
GND
R23_
R?2
R2f
-LR26_
т -ПГГ9~
 R18
i Rl 7
J16_
PS2_DA1A
PS? CLK
??
24
36
37
38
43
40
42
2
3
.7
10/GSR
103.16
102.5
102 6
102.8
102 15
C0/GTS2
[QyGTSl
101.5
JOI 6
T0/GCK3
XC9572XL
118
DIGITAL CIRCUITS
Deciphering Digital Circuits
ZL 9572 Experimental Board
JOI 2
44
102.17
102 2
104 14
104.15
104 17
104 11
104 8
104 5
104 2
35
29
33
34
28
27
26
25
103 8
103 2
103 5
103.11
103 17
103.15
103.14
103 9
13
11
12
18
2_2
20
19
14
101.15
I0/GCK2
101.8
101.17
.8
€
-PC44
IC3
p?
+3V3
MAX3232CPE
+3V3
+3V3
C3 =!= C2
lEDu
lED8
4-DIGIT
7-StGMEHI
I.TSPlAY
DIN
T2IN
RIOUr
R20UT
IC2
LF33CV
C2+
02-
C1 +
C1-
vo
ONO
T10UT Д4.
Т-ЗП1 IT I
RIIN-p
DTTK1 «
+3V3
VCC ’6-T
V+ I2
V- 6
9
LEO/
8
STA1IC
И C-YNAMI'
L LEOS
0I5P
PN3
9
102
,03
RN1
2
3
4
GND—-
{R14
LEDO
iF’Jl
lED2
LED3
lED4
LED5
lED3
LED 1П
IEOH
LED 12
1.ЕГ13
LED14
LEC15
-ГлО—
Пз~|
4----|~R2~1-
9_ -ОП—
10
12
.1

в

-4 6
-> 7
4' 8
'! 9
1
-H 2
4 4
-i з
5
= C1
RS 232
SW1
Deciphering Schematics
119
ChaptHi 4
The ZL-9572 experimental board is designed by Di. Jarostaw Sugier126 and used in his Digital
Circuits Design course laboratory classes. It is a CPLD board for teaching students how to
control the various resources available via a J7AG port using the Xilinx Integrated Synthesis
Environment (ISE) tool.127
At the heart ot tnis experimental beard is a Xilinx XC9572XL chip, a complex programmable
logic device in a 44-pin plastic leaded chip carrier (PLCC) package, containing 72 independent
macrocelis Most of the pins are Di-dnectional and must be configured according to the type
of components they are connected with. Tne means to configure and test this CPLC Is via a
JI AG port using a custom caole connected to a PC running the Xilinx ISE soft warn
I/O
I'O
I/O
1'0
I/O
I/O
1'0
Ю
l/O.'GCK
l/O/GSR
I'O/GTS
XC9572XL Block Diagram
126 Lecturer at the Wroclaw University of technology. Poland.
127 Xilinx ISE primarily targets development of embedoed firmware for its FPGA and CPLD integrated circuit
product families.
120
DIGITAL CIRCUITS
Deciphering Digital Circuits
Sharp eye readers will notice that there are three pins denoted as IO/GCK1, 2 and 3. These
are global clock lines which can accept clock signal inputs or be configured as general I/O pins.
Multiple clocks are often 'equred because several parts of the CPLD will be programmed with
separate functionalities that operate asynchronously from each otner using separate clock
domarns.128 In our case, the CPLD’s IO/GCK1 and 3 pins are connected to an oscillator and a
555 timer, respectively, while TO/GCK2 is used as an output drive pm for one of the 7-segment
displays.
Oscillai or xi has a quartz-stabilized frequency of 1.8432 MHz and if you’re good in math, you’d
probably guess mat it can be sub-d vided down to 115,200 Hz for use as the baud rate clock
for the RS-232 port. The oscillator serves as the primary clock source for other logic functions
as well due to its stability. The 555-timer, on the other hand, provides a low frequency clock
signal of either 1 hz or 240 Hz, depending on tne position of SW3 which selects C8 or C9 for the
timer's charg.ng and discharging time constant. The speed of this low frequency clock is
visually indicated by i_EDl 6.129
Primary input s.gnals on the experimental board are a set of tactile pushbuttons (K0-K7) an
8-bit DIP-switch (SW4; and a rotary encoder (SW5). Pressing a pushbutton or setting a switch to
the ‘ON’ position generates a logic 1' (act ve high). Notice that pushbutton К 7 is connected
to the Global Set/Reset (GSR) pin and is thus used to initialize the CPLD. Since the DIP switch
and pushbuttons are connected in pa'allei bitwise, the former must nave ail eight bits set in
the OFF’ positions to be able to use the pushbuttons. K5/SW4-3 and K6/SW4-2 also shared
common signal lines with the rotary encode, s A-В pins which, if not in a stabilized (dent) state,
can interfere with their ooeration.
Rotary encooers are either optical or mecnanical. as in our
case A mechanical encoder works simply by connecting the
Phase A and Phase В pins to a common C pin. Mechanical
contacts inside the encode, create the quadrature signals as
the shaft is rotated and depending on tne direction ot rotation,
will produce a 90-degree lead or lag phase on the A-В pair
signals Since tne two encoder pms A and В are joined with
K5/SW4-3 and K6/SW4-2, these must remain open (OFF)
during encoder operation. On the otner hand, it the encoder
is not used, its knob must remain in the stabilized (oent)
position so that the A and Б switches do not interfere with the
two pusnbutton/DIP switch pair signals.
128 That's the reason why CPLDs also have multiple VCC and GND lines, foi better disthoution of power to their
internal core 1031c elements ana I/O blocks.
129 The 1 Hz signal is useful for step-by-step debugging of sequential circuits while the 240 Hz clock is dedicated
to dynamic control of the 4-digit 7-segment display but can also be used as a slower system clock in place of the
oscillator.
Deciphering Schematics
121
Chaptei 4
Diodes LED0-15 are the primary outputs on the board. These indicators hgnt up when logic '0'
(active low) is applied. The CPI D pins that drive IED8-15 are also shared with a group of four
7-segment display that is controlled by four corresponding digit activation signals. SW1 selects
whether LED8-15 or the 7-segment display will be operated.
Both digit an J segment activation signals are active low. Each
7-segment is common anode (CA) and is pulled to +3.3V when
SW1 is in the DISP position. Similar segments of the 4-digit
display are connected in parallel, allowing an 8-bit output to
control all four digits but only a selected digit to light up based
on the common anode that is turned on.
DP G F E
7 6 5 4
D С В A
3 2 10
The most significant digit (leftmost) has tne option of either static or dynamic display based
on tne position of SW2. The idea oehmd dynamic ope-ation is to activate each digit in sequence
such that, if multiplexing is fast enough the human, eye will see a stable and simultaneous
display of four different digits. The 240 Hz low frequency clock is suited for this purpose since
it can give a 60 Hz (240 • 4) refresh rate across all four digits.130
Serial communication is faci.itated by a MAX3232 RS-232 controller which converts the logic
voltage from +3.3V to +5V and interfaced to a DB-9 female socket for external connection. For
a single cnannel, one pair of transmit and receive bnes is all that is required.
Finally a PS/2 port is implemented using a 6-pin mini DIN socket with just two port signals
(PS2_CLK and PS2_DA1A) connected to tne CPLD. This makes i1 possible foi the experimental
board to be connected to either a PS/2 keyboaid or mouse.
Of course, some kind of voltage legulator is also needed to convert an external DC source to
power the ZL-9572 board. A 3-tenriinal standard TO-5 package regulator (IC2) fits nicely with
a basic amount of filtei mg at its input and output.
It is beyond the scope of this book to teach CPLD programming. There are plenty of resources
available online that readers can easily find and leain from, whether it's written or video
tutorials If you’re interested to know more about Xilinx CPLDs and the ISE design tools, you
can download a copy of Programmable Logic Design Quick Start Handbook ,131
130 The oscillator frequency is too high, for this purpose due to the latency of LED curing on/off switching.
“1 httn://www.zsk.ict.nwr.wroc.nl/zsk/renositorv/dvdaktvka/uc/pnld/heeinners ;Щ1
122
DIGITAL CIRCUITS
Deciphering Digital Circuits
Further Studies
Whether you’re new to digital electronics or thinking to refresh your knowledge, the following
free online tutorial course might just be what you're looking for:132
Offered by NESO Academy for free, this 208-module course on digital electronics covers the
basics upto programmable array logic. Each module is between 5-15 minutes in length and
is taught using electronic blackboarding which helps retain focus and better assimilation of
the information presented. You can follow the course in sequence or jump to a specific module
of interest. Total course duration is about 30 hours.

Deciphering Schematics
123
ЙИОВ CIMIT5
I taenta о? Glnalog Circifiibs
if digital circuits are the writing systems of the electronic world, tnen analog circuits may be
likened to its equivalent of ancient pictorial scripts, mucn like tne Egyptian hierogiyphic-
hieratic versus tne English alphanumeric systems:
v w x
DEF
q. R\
KIM
И n
н I J
Л в л
О P Q
I	Д	HI	iH	*1	‘2.	Z	=?	<
1	2	3	4	56789
10	20	30	40	50	60	70	80	90
jn,
100	200	300	400	500	600	700	600	900
J	£	<u	yj
100J 2000 3000 4000 5CO0 6000	8000 9000
Egyptian Hieroglyph cs
Hieratic Numerals
Pictorial forms may look simple at first glance but their meaning can be cryptic and hard to
decioher without proper references. While analog circuits may not be as sophisticated as their
digital counterparts in terms of design and complexity, ‘iguring out their functionalities is not
that, stra ghtfonward for most novices. The key to unlocking any anaiog circuit lies in identifying
its makeup—the types of components present and their circuit topologies.
We will look at some aspects of analog electronics, specifically the components and their
characteristics in relation to schematic diagramming, and the topologies involved in the ways
they are useo in circuit designs. Of course, analog electronics is much broader that what car
oossibly be covered in this book (or any single book), but as the legendary Steve Wozniak once
sain:
I'd learned enough about circuitry in nigh schcoi electronics to know how tc
drive a TV and get it to draw—shapes of cnaracters and things
Hopefully, you will learn enough to decipher analog circuits in this chapter.
Deciphering Schematics
12b
ChaptHt 5
Discrete vs Integrated
A discrete circuit is composed of discrete components which are manufactured separately as
single, standalone units. These components are connected together using copper tracKS on a
circuit board. An integrated circuit133 is a microscopic composition of electronic components
(res'stors, capacitors, diodes, transistors, etc.) that are diffused onto tne surface of a semi-
conductor material, such as a silicon wafer.
Discrete Circuit
Integrated Circuit
Wnile integiated circuits are now widely used in analog designs due to ease anc parametric
stability there is still a handful o' industry tnat rely on discrete circuits to perform their much
needed functions, in particular the audio and power sectors. For instance:
•	Discrete components can run in class A single-ended or peak-to-peak more easily,
especially in the final audio output stage where a soud-state device can get quite hot.
Class A always runs hotter but sounds better.134
	Discrete can operate at higher voltages, in excess of 1 ?0V on a power supply rail.
	Higher output cutrent can be achieved depending on the device, wmch often means
lower output impedance under some circumstances. Again, it's a power dissipation
issue.
	Foi audio enthusiasts, discrete designs tend to use more resistors and capacitors in
the circuit that add tneir own sounds to achieve a certain dimension of enjoyment for
people with sensitive hearing.135
133 The integrated circuit was invented by Jack S. Kilby in 1959.
134 Op-amps tend to run in class Б or class AB just because they don't have the ability to dissipate heat as well
and have to be designed to run cool due to theii small size.
135 Op-amps, by reason of their intricate internal designs with substituted internal resistors to eliminate coupling
capacitors, can sound rather clinical and boring.
126
ANALOG CIRCUITS
Elements of Analog Circuits
Converse'y, analog ICs can usually squeeze the equivalent of hundreds or even thousands ot
discrete devices in a single chip hence they will generally be more linear (accurate, precise)
in mission critical applications. And increasingly, analog circuits tooay contain a mix of both
discrete and integrated components so it’s important to be able to read and decipher these
two types of schematic diagrams.
Be-ow a>e two illustrations of an FM Transmitter circuit, the first using discrete components
and the second using integrated circuit, for comparison'
Simple FM Transmitter (Discrete)
Simpie FM Transmitter (Integrated)136
136 The UPC1651 is a silicon monolithic mtegratea circuit designed as a wideband amplifier covering from HF
through UHF band. It has a high power gam of 19dB at 500MHz and iow voltage operation of 5V encased in an
MMIC package.
Deciphering Schematics
127
ChaptHi 5
Passive vs Active
Components whicn do not need an external power source to function are passive in nature;
examples include resistors, capacitors, and inductors. Components which depend upon an
external power source to operate are active; discrete semiconductors such as diodes and
transistors, as well as integrated circuits, fall into this category. Similarly, a c.rcuit which is
made up of purely passive comoonents is a passive ciicuit, while a circuit which requires a
power source to work is considered an active circuit.
Tne following table highlights the differences between active ano passive components based
on their behavioral characteristics in a circuit:
Characteristics	Active Component	Passive Component
Power	Delivers power to the circuit	Employs power in the circuit
Elements	Includes d.odes, transistors. SCR. catteries, and cells	Induces resistors, capacitors, inductors, transformers, etc.
Operational Requirements	Requires external source for operation	Dees not require any external source for operation.
Power Gam	Capable of providing power gam (just line an amplifier)	Cannot provide any power gain
Energy Storage	Cannot store energy	Can store energy (in the case of inductors and capacitors)
Energy Behavior	Energy donor	Energy acceptor
Current Flow	Can control current flow in the circuit	Cannot control current flow in the circuit
Linearity	Normally non-linear	Normally linear
Amplification	Can amplify signal (have a gain of more than one)	Unable to amplify signal (have a gain of less than onej
The ove-leaf display chart provides an overview of the types of semiconductor components
that can be found in circuits, with the discrete type predominantly present in analog designs
compared to their digital counterparts. Electrical symbols are listed in Appendix A.
128
ANALOG CIRCUITS
Deciphering Schematics
Semicondjctor Devices
r
T
Discrete
Optics
Microwave
•	Diodes
General Purpose
High Speed
Switching
Zener
TVS
Vaiiable-Cap
•	Transistors
Bipolar rBJT)
Junction FETs
MOSFETs
iGBTs
•	Thyristors
	Modular Units
•	Light Emitters
LEDs
Laser Diodes
•	Detectors
Photo Diodes
°hoto transistors
Photo Thyristors
Photo 7 riacs
Image Sensors
•	Composite
Optocouplers
•	Communications
Fiber Optics
•	Discrete
HF Diodes
HF Tiansistors
•	Integrated
GaAs
MM ICs
•	Micro Modules
•	Accelerator Motion
•	Magnetic
•	Thermal Inflated
•	Particle Wave
•Sound Frequency
•	Pressure Stress
Integrated
• Linear
Cp Amps
F-ample-and-Hold
Driveis
Multiplexers
• Power
PWMs
PMICs
• Hybrid
ADCs
DACs
Elements of Analog Circuits
ChaptHt 5
Mechanical vs Solid-State
Contrasting mechanical and solid-state devices almost invariably lead to a discussion of relays
since its the most common analogue piece many engineers are familiar with. But there is
more in comparison than Just relays alone;
Solid-state
MENS Switch137
The first three types are found and used widely today, while the fourth is mainly employed in
specific applications with stringent requirements
Another example is the ootentiometer:
Mechanical
cs E 1
sck E
SDI/SOO E
vss e
□ VOD
POP
POW
PCA
Digital (MCP41 xl)
Mechanical potentiometers come in vanous packages, such as rotary, single- and multi-turn,
pre-set, slioei trimmer and linear. For solid-state or digitally controlled types, there are two
ways of varying output resistance: pushbutton (resistwe elements array) and programmable
SPZ interface (internal resistot network).
137 Micro-Electromechanical Systems (MtMS) switches are really electrostatically actuated relays using micro-
machined cantilever beam switching elements as contacts The challenge that has thwarted many compar.ies
who have tried to develop MtMS switch technology has been delivering reliable products in high volume mass
production, though.
130
ANALOG CIRCUITS
Elements of Analog Circuits
Passive Discrete
Resistors, capacitors, and inductors are primary types of passive discrete components, In their
most basic form, they come with two-terminals, through-hole or SMD:
voltage v
Resistor	» Capacitor
dv= ffdi ft dq=Cdv
Current i --------------dq tit -► Cnarge q
inductor
d® - Lai
Meinrisior
d«> = Mdg
+ Flux <P
Resistors oppose (restrict, limit) the flow of current and are employed to control current and
manage voltage levels in a circuit. The relationships between resistance, voltage and curient
conform to Ohm’s Law such that current is proportional to the applieo vo'tage and inversely
proportional to the resistance (i.e., V = IR).
Capacitors nas the ability to store electrical charge exponentially, the amount of charge being
determined by the capacitance vaiue and tne voltage applied aooss the device (i.e., Q = CV).
One important use of capacitors is passing alternating current while blocking direct current,
also known as AC coupling
Inductors are coils with one or more windings o* conductive wire wrapped over a medium (air.
femte. etc.). Current flowing through an inductoi induces a magnetic field that serves as a
storage of energy (j.e., Eb = -L[AI/At]). It also generates a counter electromotive fotce (plus
induced current) that restricts the flow of alternating current while allowing direct current to
passthrough.
Memnstors138 can be thought of as the fourth basic element next to resistors, capacitors, and
inductors. UmiKe a normal resistor which exmbits constant resistance a memiistor can vary
its resistance with applieo current. A major feature of the memnstor is its ability to remember
its state history, making it suitable for use in memory sto'age applications.
138 This unique component is included only for discussion sane. Since it is not commercially available at present,
we will not covei it when deciphering schematic diagram.
Deciphering Schematics
131
ChaptHt 5
Linear
Resistors
SuperCap
PtT  Polyethylene Terephrhalate
PP - Polypropylene PPS -- Folypheny.ene Sulfide
PTFE - Polytei rafluoroetnylere
PC - Po yca"bonate PS - Polystyrene
PEN - Polyethylene Naphthalate
EDLC - Electric Double caver Capacitor
132
ANALOG CIRCUITS
Elements of Analog Circuits
Inductors
Tne charts above illustrate just hew immense tnese passive discrete components are, let
alone their electrical symbol representations. Commonly used ANSI standard symbols are
shown below:139
RESISTOR	POT	PRESET	VARISTOR	LOR
CAPACITOR ELECTROLYTIC VARIABLE	TRIMMER	lEEDTHRU
INDUCTOR IRON CORE	FERRITE	VARIABLE	PRESET
Here are some equivalent IEC standard symbols for the resistor
139 Additional symbols can be found in Appendix A. Note that ANSI and IEC symbols are used interchangeably in
this book to get readers acquainted with these variants.
Deciphering Schematics
133
ChaptHt 5
Variable resistors (left) and capacitors (right) come in many different forms:
Passive discrete components are not limited to just two-terminal or variable types. Resistors
can be grouped or networked into single packages (SIP, DIP) while inductors can combine to
form two or more wind.ngs around a common core as transformers (center-rapped, toroidal,
multi-windings):
Fuses are a special class of resistors exhioitmg low resistance and used as piotective devices.
Tney come in different packaging as well—axial, radial, through-hole and SMD
Most fuses blow up when the current exceeds their ratings and will need to be replaced. An
alternative kind known as resettable fuses ooen upon overcurrent condition and recover when
the current returns to normal.
134
ANALOG CIRCUITS
Elements of Analog Circuits
Active Discrete
Active discrete components can modify the power level of a signal but require a power source
to operate. Examples are diodes, bipolar transistors (BJTs), junction field effect transistors
(JFEIs), and metal-oxide semiconductoi FETs (MOSFETs).
Diodes are two terminal semiconductor devices that allow current flow in one direction only.
They exhibit low or negligible resistance in one direction and high resistance in the reverse
direction, hence prevent current flowing both ways.
One main application of diodes is m rectification—converting AC to DC. Since diodes allow
unidirectional current flow, they are often found in reverse polarity and transient protection
applications as well.
Deciphering Schematics
13b
ChaptHt 5
D.odes are classified according to their electrical characteristics and come in different types
and packages including rectifiers, small-signal switching, Schottky barrier, Zener (constant
voltage), and tnose designee for high-frequency applications.
M-S-Metal Semiconductor TVS-Ti ansient Voltage Suporessoi
LED - Light Emitting Diode FRD - Fast Recovery Diode
Examples of diode schematic symbol representations are shown below:
Diodes are not limited to just a single device oer paertage; diode pairs come in SOT-23 outlines
while mini-SMD ICs can contain one or mote diodes.
---------------SOT-23---------------- Mini 2P Mini 6P
Common	ccm-non Series
Anode	Cathode	Connection
Switching,Surface Mount
136
ANALOG CIRCUITS
Elements of Analog Circuits
The generic term ’transistor describes a three terminal semiconductor device and can refer
to the three major types—bioolar junction transistors (BJTs). junction field effect transistors
(JFET s), or insulated gate bipolar transistors (IGBTs).
IGBT - Insulated Gate Bipolar Transistor
IMP’ - Non Punch-Through
PT - Punch Through
P Ch N-Ch P-Ch
Basic transistor schematic symbol representations are shown beiow.
ВЛ NFN BJT PNP
JFET N-CH
JFET P-CH
WITH GROUNE
SHIELD CASING
N-CHANNEL P-CHANNEL	N-CHANNEL P-CHANNEL
MOSFET (DEPLETION)	MOSFET (ENHANCEMENT)
Some schematic drawings de not include the ciicle in the transistoi symbols out they are the
same When a transistor has a casing that act as shielding against EMI it is indicated with an
additional dotted circle with a ground (right figure).
Deciphering Schematics
137
ChaptHt 5
iransistors can aiso be paired together for greater current drive, such as the Darlington pair
configuration, or packed into an array inside a single IC:
« PIN 10
1/8 ULN2803
Transistor Array
(ULN2803)
Thyristor'40
Tne thyristor is a peculiar piece of semiconductor device. The difference between a bipo.ar
transistor and a thyristor is the former is a 3 -1 aye r device that requires continuous current to
conduct, whereas tne latter nas 4 layers and requires only a single tugger pulse to initiate and
maintain conduction. So instead of tne n-p-n or P-N-P layers found in BJT, tne tnynstor nas
alternating P-N-P-N layers.
GTO
GhI
SiTP
MCT |
LASCR
FCT	- Forced Commutated Thyrstor
LCT	- Line Commutated Thyristor
MCT MOS-Controlled Thyiistoi
R( Г - Revetse Conducting Thyristor
G-0 -Cate Turn Off
GATT - Gate Assisted Turn-off Thyristor
Sit H - Static Induction 'hynstor
LASCR - Light Activated Silicon Controlled Rectifier
140 Thyristors and diooes share some similarities and are used for rectification purposes, however, they are very
different in terms of structure, working, ratings and applications. In a sense, a diode is an uncontrolled rectifier
wh.le a thyristor is controlled. For this reason, it is also known as a silicon controlled rectifier (SCRL
138
ANALOG CIRCUITS
Elements of Analog Circuits
Analoq ICs
Integrated circuits are classified into analog, digital and mixed signal crcuits. Digital ICs can
comprise logic gates, multiplexers, flip-flops, and other smaller circuits that process bi-state
signals to oerform Boolean algebra functions.141 142 Analog ICs are less complex and process
contmuous signals by oerforming functions sucn as amplification, demodulation, mixing, ana
active filtering.342 Examples of analog ICs are operational amplifier's and power management
devices
The operational amplifier or op-amp in short, is an analog IC that is
w.dely used as a building block in many analog circuit designs. It has
been around for many years and come in different makes and models
in terms of power, frequency range and other characteristics On its
own, the op-amp can be configured in a variety of amplifier and filter
topologies. It is also not uncommon for complex anaiog ICs to have op-
amps embedaed within to provide integrated constant current source,
comparator, amplifier functions, etc.
One such popular analog IC is the 555 timer emp which contains comparators ana other
building blocks that make it useful as an oscillator and tuning device. It’s a bit more purpose
specific than, an op-amp but is otherwise veisatile and found in many applications.
Internal schematic
Discrete implementation
We will look at some op-amp topologies and applications in later sections.
141 All ICs in essence are analog in nature. The tern) digital' is a logic construct tc define and interpret a class of
analog ICs that perform bi-state functions.
142 Analog ICs are also Known as linear ICs thougn the latter term applies more to signals operating in the linear
regions of the devices. However, we live in a non linear analog world and things only really become linear in
theory. Two common examples of analog circuit elements that exhibit non-linearity are diodes and transistors.
The former has an exponential output function to an applied input whereas for the latter, the output is initially
lineai with a small input but saturates to a constant output once the input becomes large enough.
Deciphering Schematics
139
Chapter 5
Sensors and Transducers
There is a crass of devices that is used to interface the analog real-world to electronic circuits
for tne purpose of data measurement or process monitoring—sensors and transducers—
by converting a physical phenomenon into an electrical quantity, and vice versa.
Devices which detect cnanges in physical pioperties and convert them into electrical signals
are termed sensors, whereas devices wnich convert one for m of energy into another are called
transducers. There are different kinds of sensors and transducers, analog and digital, with
input and output types to cnoose from The type of input or output transducer used depends
cn what kind of signal or process is being sensed or contra.led.
Transducers
I
Passive
Resistive
Variable Optical
-I—1
Capacitive Inductive
Tne above charts are not meant to be comprehensive, out to give you an idea of the breadth
and depth of these interfacing devices.
140
ANALOG CIRCUITS
Elements of Analog Circuits
Be'ow are some real-world sensor devices:143
Active Buzzer
Passive Buzzer
Temperature
Knock Sensor IR Receiver
LED Module
Ultraviolet Sensor
Ambient Ught Sensor
Pushbutton Switch
If Pulse Rato
Monitor
PIR Motion Sensor Hall Magnetic Sensor Temperature Sensor
Soil Humidity Sensor
Water Level Sensor
143 This collection is from the Keyestudio 48-in-l Sensor Starter Kit for the Arduino.
Deciphering Schematics
141
ChaptHt 5
Circuit Topologies
A circuit topology refers to a specific arrangement of electronic components that performs a
specific function. Analog designs entail a myriad of topologies or circuit networks that cover
various fields of real-world applications, such as amplifiers, filters, power supplies, etc. Many
topologies are named according to their conf igurat.ons and since similar circuits can be orawn
in a var ety of ways, they may be given diffcent names despite being identical in topology'. For
instance, cons derthe following networks wmch are essentially the same
7ne most basic two-branch networks are either series or parallel:
Series
Parallel
Foi tnree-branch networks there are four possible topologies:
(a) Series: (b) Parallel; (c) Parallel-Senes, (d) Series-Parallel
142
ANALOG CIRCUITS
Elements of Analog Circuits
Of coarse, real-world analog designs are tar more compiex, but this gives you an idea what
circuit topologies are all about. In the following sections, we shall Iook at some fundamental
circuit building blocks without going into the formulas and design specifications. After all, this
oook is about deciphering schematics, not circuit analysis.
Transistor144 Circuits
Although integrated circuits are very common today transistor circuit designs are still found
•n a variety of applications. Transistors come in a variety of packaging and exist to fulfil various
functions from small signal to high power, from audio to RF and switching. Common transistor
applications include amplifiers, oscillators, filters, current source, differential amplifiers, etc.
Whatever the circuit, the biasing conditions almost always follow the same set of rules: but it
is the underly ng topologies that enable transistors to be used in a rich variety of ways to
provide specific circuit functions.
In terms of amplifier applications, there are three types ot configurations: Common-Emitter
(CE) Common Base (CBj, Common-Collector (CC).
Common-Emitter
Common-Base
Common-Collector
These simplified ‘stick figures illustrate how both NPN ana P№ transistors are configured in
their orientations. In real-world applications, however, there will oe additional oiasmg and
filtering components included. The figure overleaf snows the four classifications of transistor-
based amplifiers ana their characteristic curves.
144 Also known as Bipolar Junction transistor (BJt) for its three layer sandwiched PN pair junctions, either in an
N-P-N or P-N P construction. The BJT is a current-controlled electronic device mainly employed for amplification
ana switching purposes.
Deciphering Schematics
‘43
ChaptHt 5
Class C	Class В	Class AB	Class A
144
ANALOG CIRCUITS
Elements of Analog Circuits
In real-world designs, transistors seldom ooerate atone by themselves but usually as a group,
whether in cascading stages, as complementary push-pulls or coupled Darlington pairs, like
the discrete FM transmitter depicted earlier. For our discussion, consider the following audio
amplifier circuit:
The circuit is really an operational amplifier designed around discrete components, the main
difference being the output stage is designed with high current rating to deliver nign power at
a load of b or 4 ohms. It is made up of three stages—the first being a differential amplifier
consisting of transistors QI-Q3; the next stage comprising Q4-Q6 for driving ano biasing the
final stage, a power amplifier made from a complementary NPN-FNP transistor Darlington pa.rs
Q7-Q8.
The oifferent.al amplifier piovides a high common-mooe rejection ratio (CMRR), around 70db
wh.ch is important tor nose cancellation. Tne inverting input of rhe differential amplifier is at
the base of Q2 while the non-inver.ing input is at the base of Q1. Q3 is used as a constant
current source for biasing purpose.
The input audio signal is applied to the non-inverting input while some feedback from the
amplifier's output is applied to the inverting input. Hesistors R6 and R7 function as a voltage
divider that samples signal from the amplifier output to the inverting input of the differential
pair as negative feedback,145
115 The total gain of the amplifier is determined by the feedback loop and is equal to (1+R6J/R7 = 40.
Deciphering Schematics
14b
ChaptHi 5
C5 capacitor, located parallel to R6 limits amplification at high frequencies; the upper cut off
frequency of the circuit is typically at 40KHz. C4 determines the response tc low frequencies
and cuts off around 20Hz. Thus, the amplifier has a typical bandpass response from 20Hz to
40KHz,
The output of the differential amplifier (Q1 collector) is fed to the base of Q4. This ac signal at
the base oi Q4 controls its collector current. Q4 diives the case of NPN Darlington pair Q7, while
Q5 drives the case of °NP Darlington pair Q8. Q6 adjusts the bias symmetry of the final stage
and at the same time provides temperalure compensation.146 The output stage of the
amplifier consists of the complementary transistor-paii Q7-Q8. Q7 operates m the positive half-
cycle of the signal and Q8 during the negative half-cycle. To operate at the ideal middle de
operating point, potentiometer R14 is employed. However, adjustment must be carried out
with care to prevent signal distortion.
Coil L1 is used to compensate for any parasitic capacitance in the speaker (mainly from the
crossover). C10 and R18 elements are used to fl Iter out high f'equencies. Rf 2 with C2 are used
to filter the suoply voltage of the differential stage and C2 is also used as a bypass capacitor
(also known as a free throw capacitor) for ac components on the power line. C8-C9 are used
to elim.nate unwanted nigh frequencies and noise from tne base of transistors 07-Q8. C6-C7
are used for stabilization while Cl 1 -Cl 4 are used to decouple and furtnerfilterthe ±30V supply
voltages.
In summary, deciphering (not analyzing as in doing calculations) transistor circuits involve
recognizing circuit design patterns. This starts with fundamental oevice configurations afore-
mentioned (СЕ, CB and CC), and knowing how to identify the operating classes of transistors
based on their onentations and biasing components. These are the generic features of circuit
level panerns, including differential pairs, current sources, feedbacks, filters, etc.
Once you’re comfortable with that, you may consider the higher system architecture level like
heterodyne and superheterodyne transmitters and receivers. These complex systems contain
modulators and Demodulators, delimiters, staggered-tuned stages, etc., and will require
formal studies to understand their concepts before you can decipher them with confidence.
In fact, rare and uncommon components of bygone era are still found m certain equipment
that may you come across at work even today, so never discount them.147
14t As temperature rises, the current of a typical transistor tends to increase and accelerates further its heating.
Without thermal compensation, tne transistor risks thermal runaway and damage. Output stage transistors ana
thermal comoensation (Qb-Q8) are usually metal-clad TO-3 packages ano mounteo on the same heatsink. Thus
if ihe temperature rises the current flowing through 06 will increase but this will also result in a drop in the
emitter-base voltage at 07 and 08. thus reducing the current to its former value.
147 Radar systems today still make use of heavy duty vacuum tube oevices to generate hign-power pulses for
transmission and specialized circuit arrays for target detection and differentiation. So, it you re into military-type
equ pment maintenance work, you may need to pick up these jurassic legacy of the electronic world!
146
ANALOG CIRCUITS
Elements of Analog Circuits
M Cl SFET148 Circuits
Metal Oxiae Semiconductor Field-Effect Transistors iMOSFET) are voitage-controlled devices.
Unlike the BJT which is a current-controlled device, the MCSFET does not require a continuous
base current to ooerate. Instead, a field is produced by applying a voltage on the gate to allow
current flow between tne source ana drain terminals. This current flow can oe turned on and
off by tne same gate control voltage. Because MOSFETs are more power efficient, they are the
preferred choice in the fabrication of digital and analog ICs ano circuits, replacing the once
popular BJTs.
MOSFETs come in two foims—depletion and enhancement. The former is equivalent to a
'normally-closed’ switch and requires a gate source voltage (Vgs) to turn off the device; the
latter is likened to a 'normally opened switch that is turned on by a gate source voltage.
Enhancement Mode MOSFETs
Depletion Mede MOSFETs
MOSFETs opeiate in one of the following three
regions:
	Cut-off
	Lmear (TnoGe)
	Saturation
In the cut-off region, all MOSFETs operate like a
switch; in the linear (triode) region, they behave
like voltage-controllec resistors, and in the active
saturation region, they act like voltage controlled
current sources *
148 MOSFETs are unipolar devices. Unlike transistors which are bipolar (operate with two types of charge carriers
namely, electrons ano hoiesf MOSFETs either operate w,th electrons (negative, N-channel) or holes (positive. P-
channel) charge carriers.
Deciphering Schematics
147
Chapter 5
When it comes to analogue circuits such as high-power amplifiers, oscillators, linear voltage
current regulators, etc.. MOSFETs are designed to operate in the saturation (pinch-off) region:
in digital and power electronics, they are primarily used as switches that operate in the cut-
off and triode regions. Below are examples of these three applications:
MOsFET Switching Circuit
Tne following circuits use an opto-isolator 111 for interfacing logic signal to control rngn voltage
switching, is sufficient to drive a standard MOSFET without needing an additional amplifier
stage.
R3 serves to dampen any ring.ng arising Irorr. gate capacitance or wiring inductance at high
frequency operation.149 R4 discharges any gate capacitance voltage when the MOSFET is
tui ned off. D1 is connected across the output terminals to prevent Pack EMF in inductive loads
from damaging the MOSFET.
Tne left circuit is called a low-side switch decause the MOSFET is placed between the load and
the ground. In cases where tne load requires a ground connection for safety reasons a high-
side switch configu>ation is preferred, as shown in the right circuit.
Half-Br.dge Driver Circuit
For better control of motor operation, a half-bodge driver based on an 1R2104 gate driver IC
can be employed without the need tor complex gate control circuitry. It is a level shifter/power
amplifier module that receives low-power input from a PWM controller ana produces high-
current outputs to drive power MOSFETs for a wide range of motor applications.
149 Typically. R3 should he 100 ohms or less since higher values can slow down switching.
148
ANALOG CIRCUITS
Elements of Analog Circuits
MOsFEl Power Amplifier Circuit
Compared to the transistorized audio amplifier discissed earlier, the MOSFET equivalent is
simpler with a higher power rating.
+35V
Deciphering Sctiernatics
149
ChaptHt 5
The first stage of the amplifier is a differential amplifier based on transistor pair Ql and 02. R1
limits input current and works as a voltage divider with R2. and also with capacitor Ci as a low
pass filter that bypasses high frequencies. Next is the driver stage consisting of tiansistors Q3
and Q4 that amplifies the input signal sufficiently to drive the output stage a complementary
push pull amplifier oased on MOSFETs Q5 (IRE530} and Q6 (IRF9530). The output is coup'ed to
the speaker via inductor L1. Rl 5 and C5 piovides noise reduction. Capacitors C6-C7 aie power
supply filters. P>eset R6 is for adjusting the quiescent cunent.
IGBTs150
Tne Insulated Gate Bipolar Transistor (IGBT) is a cross between a BIT and an FET transistor,
it combines the hign input impedance and nign switching speeds of a MOSFET with the low
saturation voltage of a oipolai transistorto produce another type of switching device capable
of handling large collector-emitter currents with virtually zero gate current drive.
Equivalent Circuit
Device Symbol
IGBTs offer the output switching and conduction
characteristics of a bipolar transistor but are voltage-
controlled like a MOSFET. They are mainly used in pewer
electronics such as inverters, converters power
supplies etc., where the demands of the solid-state
switching oev.ee are not fully met by power BJTs or
MOSFETs High-current, high-voltage BJls readily are
available but exhibit slow switching speeds; power
MOSFETs have high switching speeds but nigh-voltage,
nigh-current designs are expensive ana narder to
3-Tenninal or Hi-Power Modular Package
achieve using them.
150 This device is introduced here as a note of interest due to its increasing popularity and implementation in
powe electronics.
150
ANALOG CIRCUITS
Elements of Analog Circuits
Operational Amplifiers’5’
The operational amplifier (op-amp) is a three-terminal device
that is widely found in analog circuits as either a standalone
component or integrated as elements within a more complex
circuit of an IC. in essence, an op-amp is a type of differential
amplifier, though there are variations such as the dual output
full differential amplifier, tne triple op-amp instrumentation
amplifier, the nigh common mode voltage isolation amplifier,
and the negative feedback amplifier.
One of the most common and pcoular op-amo is the 741 whose omouts and compcnent-levei
diagram is shown below
□ iP-S
TOP VIEW
Op-amo circuits can be complicateo but tnere are a few simple rules and several building
oIocks (configurations) which you need to oe familiar with to effectively oecipher these circuits
and their functions.151 152 Op-amps can be broadly classified into three mam types ba sea on their
mput/output voitage ranges:153
	Dual supply
	Single supply (ground sense)
•	Rail-to-rail (mput/output full swing)
151 Operational amplifiers were originally used to model basic mathematical operations (addition, subtraction,
integration, differentiation etc.) m electronic anaiog computers.
152 Appendix D provides a list of basic op-amp configurations that you can take reference from.
153 Some classified op amps based on then region of operation—linear or saturation.
Deciphering Schematics
151
Chapter! 5
Dual supply op a mas are mo'e suited for AC signals while single supply op-amps work better
with DC signals or half wave rectifier type applications. Rail to rail op amps, on the other hand,
enable operation at lower supply voltages, swing closer to the rails, and provide a much wider
dynamic range.
Ween employed in ouen-loop tne op-amp functions as a hign-gam amplifier with the following
configurations:
In all three open loop configurations, single-ended or
differential, any input signal however small, will drive
the output to saturation. This is due to the inherent
high gain of the op-amp. This means that when
operating in open-loop, the output of the op-amp is
either saturated to positive or negative level, or else
switching between these two saturation levels in
response to polarity changes of the input signal. For
this reason, open-ioop op-amp configurations are not
used in linear applications. Instead, they are usually
employed in non-linear designs such as comparators,
oscillators, and multiviprators.
Vin < 0 /
Saturation
VCUT
Saturation
Linear
Region
-Vcc
+ VIN
1b2
ANALOG CIRCUITS
Elements of Analog Circuits
When configured in closed loop with negative feedback, the op-amp exhibits stabilized gain
as a wideband linear amplifier;
Inverting
Non-inverting
Differential
The p'operties of a closed-loop amplifier are largely dependent on the characteristics of its
feedback network rather than the op-amp itself.154 Since no op-amp has all its parameters
opt’m.zed, some are suited for DC operation while others are better in AC performances. For
DC amplifiers, their output signal changes in response to variations in the DC input level. To
improve accuracy, such op amps usually have offset null capability.155
DC amplifier with offset nulling
What distinguishes a DC amplifier from an AC amplifier is the coupling capacitor at the input
stage. The coupling capacitor (Cl) not only blocks DC voltage but also sets tne low frequency
cul-oP limit of tne AC amplifier. Generally, op-amps can operate from a single or dual voltage
supply, as in the case of the /41. Some op-amps, like the i_M 1 24 series, are designed to operate
from a single supply, such as in battery operated applications.156
154 A typ.cai feedback network is composed of resistors and capacitors; since these discrete components are
available in high precision with low drift, op-amp circuits can achieve improveo stability and hign accuracy with
careful selections.
155 External offset voltage compensation network should be used if there are no offset null capability provioed
by the op-amp. Otherwise, a high-precision op-amp with smaller offset and drift is p'efeireo.
156 Single supply op-amp design is more complicated than dual supply design and usually involves some form of
biasmgfor proper operation.
Deciphering Schematics
.53
ChaptHt 5
Ideally, an op-amp should exhibit a gain that s independent of the signal frequency In the
real world, gain starts decreasing at higher frequencies. If gain is increasea (by increasing R2)
the roll-off effect will start at lower frequencies, as depicted in the diagram below:157
Foi linear op-amp applications, negative feedback networks comprising resistors capacitors,
and other discrete components are selected to achieve optimal gam-frequency response. It is
important to be acquainted with the three basic configuiaticns—inverting, non-inverting, and
differential—since they are commonly employed in linear designs such, as summing, scaling,
and averaging amplifiers
Inverting Configuration Non inverting Configuration Differential Configuration
Tne functions of these configurations will depend on the relationsnip Detween the feedback
resistor Rr and the input resistors Ra, Rb and Rc. Tne differential configuration is a suotractor
for single pair inputs, and the difference between the sums for multiple branch inputs.
157 Most op amps are designed with this feature to prevent oscillation; in other words, op-amps are internally
compensated for stability. For those without this built-in feature, external compensating components may be
required to tailor the gam-frequency response.
1b4
ANALOG CIRCUITS
Elements of Analog Circuits
Integrators and Differentiators
Op-amps, being widely used in analogue computer applications, are well suited to carry out
such mathematical operations ot integration and differentiation with the help of a few basic
discrete components as shown below.
An integrator produces a steady changing output voltage for a constant input voltage, whereas
a differentiator in reverse will pioduce a constant output voltage tor a steady changing -nput
voltage. This can be illustrated by how a square wave is transformed after passing through
them.
Input signal
> t
Integrator output
Differentiator output
As can be seen, an integrator behaves like a low-pass filter while a differentiator acts as a
high-pass filter. Ideal integrators and differentiators exhibit output saturation and instability
so some form of gain control ar.d compensation is necessary, as shown below:
Practical differentiator
Deciphering Schematics
15b
ChaptHt 5
The objective is tc achieve a straight-line response at tow frequencies and limiting the gam at
nigh frequencies in the differentiator, while reducing the gam to prevent output saturation in
the case of the integrator. Integrators are commonly used in analog-to-digital converters, ramp
generators and wave-shaping functions, whereas differentiators are suited for generating
periodic and trigger pulses, as well as detecting high frequency components in signals.
Voltage References
Tne versatility of op-amp ,s found not only in large, complex circuit but in simple applications
in some instances. One example is an op-amp based voltage reference. 01 course, a resistor-
oased fixed voltage divider will piobably work just fine or if an adjustable voltage reference is
required, a precision potentiometer will likely fft the bill.
But should you need a voltage refe rence that provides a constant output voltage independent
oi temperature, supply voltage, line noise, and other external operating conditions, the best
oet is still an op-amp based voltage reference source.
An op-amp exhibits a very high input impedance when
used in the voltage follower mode ana araws near-zero
current from the input reference, and a very low output
impedance that can supply several milliamos of
cut rent to an external load. Variations m output loading
nas httle impact on tne output voltage stability, making
it a better choice in mission critical or sensitive circuits
that require low voltage references (below 1.2V).
Practical op amp basec pos'tive and negative voltage references can be realized using the
following tooologies:
Note that the op-amps (CA3140 ana LF351) are wideband devices, and feedback resistor R2 is
used to enhance stability.
1Ь6
ANALOG CIRCUITS
Elements of Analog Circuits
Instrumentation Amplifiers
One of the most useful applications 01 op-amps is in industrial test and data acquisition in
which physical entities (temperature humidity, pressure, etc.) are converted to electrical
forms by means of transducers, then transferred to an instrumentation system that conditions
and digitalizes these signals for analysis. Op-amp circuits performing such functions are
known as instrumentation amplifiers.
An instrumentation amplifier is a differential amplifier with an input buffer stage that makes
it easy for impedance match ng. Some useful features of an instrumentation a mplifier include
low offset voltage, high common mode rejection latio (CMRR). nign input resistance, hign gain,
etc. An example is illustrated Delow:
This amplifier, made up of three 741s, operates from ±12V
and has a ga in of1 0. For variable gam, Rg can oe replaced
with a 5K potentiometer. Other op-amps may be used but
the supply voltage must matcn the operating requirements.
The LM324 is a good choice since it has four op-amps within
one package, reducing tne number of components used on
the PCB. Moreover, the supply voltage for LM324 can go up
to i16V for a g-eater range of operation.
We will look at some circuits using the LM324 op-amp in
later sections.
158 This is a resistive transducer bridge who resistance R- changes as a function of some pnysical energy. R*, RB
and Rc are selected so that they are equal in value to Ri at some reference condition at which the bridge is
balanced. The bridge is DC excited but can also be AC excited.
Deciphering Schematics
157
ChaptHi 5
Op-Amp Oscillators
A square-wave output can be easily generated by forang an op-amp to oscillate using a
combination ot Schmitt trigger and integrator at its inputs, as shown below tor bolh single and
dual supply implementations:
Single supply oscillator
Dual supply oscillator
Capacitor C1 s rate of charging and discharging determines the oscillating frequency of the
square wave output. The oual supply oscillator output will swing between two polarities while
the smgle supp.y will oscillate with reference to the giound.
A particularly popular oscillate' that is used in audio frequency applications is the Wien-Bridge
oscillator One implementation is shown in the figure below using an LM324 op-amp with the
equivalent diagram on the right:
Basic Wien Bridge Oscillator
Wien-bridge netwo'ks are low frequency oscillators whicn are used to generate audio and sub-
audio frequencies ranging from 20Hz to 20KHz. The two arms connected to the non-invertmg
input are really a pair of low-pass and hign-pass filters, making it a leao-iag circuit for low and
nigh frequencies, respectively.
158
ANALOG CIRCUITS
Elements of Analog Circuits
Between these two limits Is a pan. cular frequency at which the values of the resistance and
the capacitive reactance become equal to each other, producing a maximum output voltage.
This is the resonance frequency of the sinusoidal output of the Wien-bridge oscillator. Also, at
this frequency, the phase-shift between the input and the output will become zero and the
magmtuce of the output voltage will become equal to one third ct the input value.159
A1 resonance frequency, the voltages applied to the inverting and non-invert.ng terminals will
oe oquai ano in-phase with each other. Note that the voltage gain of the amplifier needs to be
greater than 1 to start the oscillation and equal to 1 to sustain them. However, op-amp based
Wien-bndge oscillators ate unable to operate above 1MHz due to the limitations imposed by
their open-loop gain.
The basic Wien-br dgo oscillator suffers from stability issues. For stable oscillator operation,
the closea-loop gam must be 1. If it is greater than 1, the oscillations will increase with time;
if it is less than 1, the oscillations will oecay. A pair of anti-parallel diodes can be employed to
provide non-lmear feedback. By using a non-linear fec-dback element, as the signal increases
m amplitude, the gain decreases; conversely, if the signal decreases in amplitude, the gain
increases. This permits a level to exist for the signal wnere the gam is exactly 1. ensuring that
the oscillator is stable.
The main problem with the diode stabilized configuration is that the output signal is more
prone to distortion because tne diodes tend to distort the waveform peaks if the gam set by
the negative feedback resistors is slightly larger than needed. Th.s also means that tne
oscillator’s output amplitude is somewhat restricted if distortion is tc be minimized Adding a
lowpass filter could also improve the quality of the signal in terms of harmonics.160
159 This is the reason whj the op-amp is required to act as a non-inverting amplifier—the Wien-Bridge network
offers zero phase-shift, which is the basic working principle of mistype of oscillators.
160 In practice, the distortion is often small and does not create any adverse mnact.
Deciphering Schematics
159
ChaptHt 5
Op-Amp Comparators
The op-amp comparator uses an open-loop configuration that operates in the non-linear
-eglon, whose output changes with reference to its two analog inputs. Because it functions
like a bistable device with two possible output states, the voltage comparator is essentially a
one-bit analog-to-digital converter with analog inputs but an output that behaves digitally. A
oasic op-amp comparator produces a positive or negative output by comparing an input
voltage aga.nst a pre-ser DC reference voltage.161 Generally, a resistive voltage divider is used
to set that reference voltage but a battery source, zener aioae or potentiometer ror a variable
reference voltage can be used, as illustrated below:
A basic op amp comparator can detect either a positive or a negative going input voltage
depending on which input terminals the input voltage and -eference voltage are connected.
In the above examples the inverting input is set to the reference voltage and the non-inverting
input is used for the input voltage. An op-amp comparator, however, can operate in either an
inverting or non-inverting configuration, and in single or dual supply moae, as snown in the
figures oelow:
Nori-inverting Comparator
Inverting Comparator
The non-mverting configuration is also known as a positive voltage comparator; similarly, the
inverting configuration is a negative voltage comparator The former produces a high output
when Vi > VREF wh.le the latter is the reverse for the same conditions.
161 The reference voltage can be set between GND and tne supply voltage but there are practical limitations on
the actual voltage range depending on the type of op-amp device used.
160
ANALOG CIHCUITS
Elements of Analog Circuits
It is also possible to pair up a positive and a negative voltage comparator to produce a window
comparator. This will require two reference voltages—an upper and a lower thresholds, for
detecting г common input voltage, as shown below.
Though a general op-amp like the 741 can be used as a basic comparator circuit, such op-
amps are usually optimized foi linear operations that is, their outputs are not designed for
iong periods of saturation. Also, tney are employed in closed-loop configurations with negative
feedback for a linear output range to achieves a good gain-frequency response.
A dedicated voltage comparator on the other hand, is a ncn linear device that tolerates high
saturation due to its inherent high gain. The voltage comparator differs from an op amp kind
n that its output stage is configured as an open-coilector switcnmg transistor nstead of a
oias.ng transistor amplifier Some examples aie tne LM311 single compa'ator, the LM339 quad
comparators, and the LM393 dual differential comparators.
Voltage comparators are used in industrial,
automotive and aerospace applications to
detect abnormal conoitions like overvoltage,
undervoltage, power fan sensing, etc. as well
as to monitor specific parametric conditions
(temperature, p'essure. fluid level, etc.) in
factory process flow.
Some ICs have built-in comparators, such as
the 555 Timer. The reference voltages at tne
two comparators are set by a divider network
of three 5K resistors—and that is the reason
the 555 is thus named.
Deciphering Sctiernatics
161
Chaptei 5
Op-Amp Power Amplifiers
We have locked at audio power amplifiers using discrete BJT transistors and power MOSTETs.
Tne op-amp can also be used in such applications by operating in its linear region. An example
circuit is shown below.
Tnis circuit is made up of two stages —a preamplifier using an NE5534 op-amp wmch provides
a voltage gain of 5, and a power amplifier composing an LM3836 with a gain of 10. This amplifier
employs negative feedback to improve frequency lesponse and reduce nonlinear distortion.
However, it suffers from transient inteimodulation distortion wheie signal delays make the
amplifier incapable of correcting distortion caused by fast, transient input s.gnals.162 An
improved version of the power amplifier stage is shown below:
1	- v+
2	NC
3	OUTPUT
4	v-
5	v+
6	NC
7	GND
8	MITE
9	VIN-
10	VIN+
11	NC
LM3886 Pinout	Improved Power Amplifier Stage
162 Older power amplifier circuits often designed the frequency response to be flat which did not achieve good
sound quality. To improve that, the negative feedback circuit should gear towards increasing the low frequency
gam to achieve the best overall effect, and also to meet the requirements of the large dynamic sound effect of
today's home theatre systems.
162
ANALOG CIRCUITS
Elements of Analog Circuits
Low frequency spectral gain is determined by tne ratio of R3 and R4. while C3 and R5 determine
gain at high-frequency. Due to the large capacitive reactance of C3 at low frequency, current
feedback is terminated at low frequencies while performance is improved at high frequency.
The overall bandwidth response is enhanced while transient distortion is greatly reduced.
Selection ot feedback components should be baseo on the impedance and inductance of the
loudspeaker so that the low-frequency gain is 2-3 times that ot the high frequency gain.
Op Amp Power Supplies
Fixed output power supolies are easily designed with standard voltage regulators like the 78xx
and 79xx series voltage regulators. But buried within the simple 3-termmal packaging of these
devices is an error amplifier (op-amp) that drives tne series element to regulate the output.
An example is the LM317 with its pinout, adjustable output voltage application and internal
circuit d agram:
Variable output power supplies, however, will reauire more thought and effort. A simple 741
stabilized adjustable linear power supply is depicted below:
Deciphering Schematics
63
Chapter 5
This oowet supply has an adjustable output voltage range of 3- 30V, controlled by RV1 which
varies the gam of the 741 op-amp. RV2 allows the output voltage to oe pre-set to precisely 30V.
Output current is boosted by the Darlington pa.r transistors, Q1-Q2. Reference voltage
provided by VZ2 is further enhanced by the VZ1 pre-regulator network.
A more coinp.ete exampie is the laboiatory power supply below which utilizes four LM324 op
amps ana a Darlington transistor pair for its senes element to provide an adjustable output
of O-30V with a maximum current rating of 1A:163
Op-amp U1D provides the reference voltage for the power supply's error amplifier u1C. U1B
monitors the output voltage and drives the comparator U1A to turn on indicator DS1 during The
output current stabilization mode. This is accomplish usirig the following steps:
	Apply a load of several ohms to the power supply output.
	Shunt the current sense resistor R14 with an ammeter.
	While adjusting the output voltage, set the output current to 1 A.
	Adjust RV3 until maicator DS1 lights up.
RVI adjusts the output voltage, while RV2 sets the output current limit.
This concludes the d.scussion on the op-amp section. Another important op-amp application
is found in filter designs which we will explore in the next section.
163 The unregulated input should not exceed t-33V which is the operating limit of the LM324 op-amp If a diooe
bridge is used to rectify the AC source, make sure that the step-down transformer's secondary output voltage
does not exceed 25Vac.
164
ANALOG CIRCUITS
Elements of Analog Circuits
Filter Circuits
Filters can be analog or digital.164 The common passive (unpowered) analog filter consists of
the familiar inductor-capacitor (LC) or resistor-capacitor (RC) circuits. If some kind of active
device is used, the circuit becomes an active filter. Most active filters use op-amps with a
variety of геесЬаск circuits.
There are four basic types of filter responses
below:
as shown in the frequency response curves
Low-pass (A); High-pass (B); Band-pass (C); anc Band-stop165 (D)
A filter is maoe up of a collection of discrete and/or integrated components that conforms to
a certain paltern ortoooiogy.
164 A digital filter requires analog signals to first be converted into digital data bits representing the original signal
Once digitized, any mathematical operation can be performed on the data to improve its quality or create new
effects. The resultant digital data can then be converted back to an analog signal for listening.
While digital filters are found in many modern communications and signal processing circuits, analog filters are
required in high-power applications such as transmitters and duplexers. At very low signal levels where digital
data may not have enough resolution in bits to represent the signal, or at very high frequencies in which sampling
isn't fast enough, analog filters are still the only practical choice.
165 If the stop band is very narrow and highly attenuated over a few hertz, it is commonly called a notch filter.
Deciphering Schematics
16b
Chapter 5
L-Topology	T-Topology	T1-Topology
Unbalanced form topologies
С-Topology	H-Topology	Box-Topology
Balanced form topologies
Consider tne various passive filter topoiogies made up of LC discrete components. Depending
cn the positions and values of the inductors ana capacitors, these can form iow pass (LPF),
high-pass (HPF), ot bandpass filters (BPF):
2C1 L1/2	L1/2 2C1
Band-Pass (T)
High-Pass (П)
Low-Pass (L)
Unbalanced form topologies
Low-Pass
Band-Pass
Balanced (real-world) topologies166
166 Balanced topologies are common in differential filter designs that are used in communication systems.
16b
ANALOG CIRCUITS
Elements of Analog Circuits
In addition to the categories (LPF HPF, BPF, etc.) mentioned filters are also identified by the
order of their designs.167 A first-order filter is the simplest type; the higher the order, the faster
the roll-off rate and hence the better the filter performs. Low-pass and high-pass filters can
oe first-order, second-order, thiro-order, and so on. However, band-pass and band-stop filters
(BSF) must эе second order 01 higher, though it is possiole to achieve the same result oy
combining two first order filters.168
Some examples of first and second order low-pass filters using passive discrete components
are shown below:
1st order (RC)
Filter order is dependent upon the numbe' of reactive (capacitive and inductive) components
oresent. These devices create poles’ that define the roli-off rate of the filter, so a second order
filter can also be called a two-pole filter. The following fiepuency response iBoae plot) of a LPF
illustrates the roll-off rates with reference to the filter orders:
Roll-Off Rates
Oroer: -6dB/octave
-2CdB/decade
Order:-12dB/octave
-40cB/decade
Order:-18dB/octave
-60cB/decade
Order:-24aB/octave
-80cE/decade
Normalized Frequency (Hz)
167 The order of a filter is determined by the form of differential eouation governing the filter's behavior.
168 A passive band-pass filter is formed by cascading a low-pass filter (LPF) with an overlapping high-pass filter
(HPF). The cut-off frequency of the LPF should be higher than the cut-off frequency of the HPF (the case is
reversed for band-stop filter). This produces a flat-topped pass-band with a relatively wide bandwidth. For a
narrower pass-band rhigher Q) an active filter must be used.
Deciphering Schematics
167
ChaptHt 5
What distinguishes an active filter from a passive one is the presence of active components
(transistors, op-amps) and the need foi an external powe- source to operate. Active filters
perform better and is less bulky169 170 out can be more complex in aesign and expensive Beiow
are examples of active filters using transistors and op-amps.
Transistor-oased Active Filters170
Opamp-oased Active Filters
Tne simple BPF above is made by combining a first order LPF
filter witn a first order HPF filter. However, this design
possesses a wide bandwidth and low Q factor that makes it
impractical for real-world applications A better alternative
would be the figure on the right. This configuration is also
Known as multiple feedback (MFB) band pass filter We will
talk more about this later
169 Active filters also contain resistors and capacitors but not inductors which can add to the bulk of the design.
170 Transistoi based active filters are uncommon these days since op-amp become the choice of active element
in modern filter circuits There are exceptions when space is premium and wideband response is desired—this
is where transistor-based designs fit in. The wideband response of transistor filters is also the reason why only
2nd order and above configurations are used in real-world applications.
168
ANALOG CIRCUITS
Elements of Analog Circuits
Active filters can have more than one section (or stage) and have complex arrangements, but
are identifiable based on their cnaracteristics. We will look at four popular types—Bessel,
Butterworth Chebyshev, and Elliptical.171 The following frequency response curves, based on
an LPr design, give us a good idea of their performances:
From the resoonse curves, we see that the Bessel type filtei fared the least among the four.
The Butterworth filtei has a maximally flat response but with a less than iceal roll-off the
Chebyshev filter has a noticeable amount of ripple on the pass-band but has a fast initial roll-
171 The Butterworth filter is most commonly found in audio applications, while the Chebyshev filter is pooular
with acoustics (loudspeaker box, pod combination, etc.) but is generally not desirable for crossovers or other
pui poses.
Deciphering Schematics
69
ChaptHt 5
oft, and the Elliptical nas the steepest roll-off, notwithstanding the slight rippies in both the
oass-band and stop-band.172
Some of the topologies that are used to implement the above filter types include Sallen-key,173
multiple feedback (MFB), state variable, biquadratic, etc. A topology can produce different
types of response curves desci ibed earlier oased on the selection of component values, from
the op amp to the RC combinations. We have seen a few in the previous pages but due to the
immense combination-permutations of ail these overlapping topologies we will only look at
several basic examples.
The circuit to the right snows a modified twc-pole
Saiien-Key low-pass filter that can be configured as
any of the three basic tyoes.
Higner order filters with more poles can be formed
oy cascading stages. To determine the values of R
and RF, first determine the k! and k2 parameters
from the table below, then arbitrarily seject R1 ano C
(e.g., 1ЭК and 0.01 uF), and finally calculate R and RF
usmg the equations given for tire desired cut-off
frequency.
where fc - cutoff frequency
The following table provides the pole parameters for selecting the appropriate resistors and
capacitors, based on the formulae given above.
No	of Poles	Bes k1	sei k2	Butter kl	v.orth k2	Cheb^ kl	rshev k2
2	Stage 1	0.1251	0.268	0.1592	0.586	0.1293	0 842
4	Stage 1 Stage 2	0.1111 0 0991	0 084 0.759	0.1592 0.1592	0.152 1 .235	0.2666 0.1544	0.582 1 660
6	Stage 1 Stage 2 Stage 3	0.0990 0.0941 0.0834	0.040 0.364 1 .023	0.1592 0.1592 0.1592	0.068 0.586 1 .483	0.4019 0.2072 0.1574	0.537 1.448 I .846
Parameters for designing Bessel. Butterworth, and Chebyshev (6% rippie) filters
For example, to design a 1 kHz single stage (2-poie) Butterworth filter, use tne parameters k1
= 0.1592 and k2 = 0.586. Arbitrarily selecting R1 =10K and C=0.01 uF ^common values for op-
ainp circuits), R and RF can be calculated as 15.95K and 5.86K respectively Rounding these
last two values to the nearest 1% standard resistors results in R=15.8K and RF=5.90K. The
172 Elliptical filters are widely used in digital signal process ng applications where its steep roll-off is aesired and
ripples are generally tolerable.
173 The Sallen Key configuration, also known as a voltage control voltage source (VCVS), is one of the most widely
used filter topologies because its performance is the least dependent on the op amp, which is configured as an
amplifier instead of an integrator, minimizing the gain-bandwidth requirements of the op-amp
170
ANALOG CIRCUITS
Elements of Analog Circuits
particular op-amp use isn t critical as long as tne unity gam freouency is more tnan 30 to 100
times higher than the filter's cut-off frequency. This is an easy requirement so long as the
filter's cut off frequency is below 100kHz.
Wc have just seen an example of the Sallen Key low pass filter. Here are the high pass ana
□and-pass filter topologies:
Unlike the Sallen-Key filters, multiple feeaback (MFB) filters use the op-amp as an integrator
nence are highly dependent on the op-amp transfer function parameters. Also, MFB filters by
design invert signals passing through them, which ada a further 180° on top of the pnase shift
introduced by the filters themselves. We did briefly mention an example ot a band-pass filter
earlier; below are the topologies for tne low-pass and high pass filters:
As with the Sal.en-Key filters. MFB filters are second order (two-pole; which are used as basic
DuildTig blocks for higher order filters. MFB filters are preferable wnen htgn gain or large Co-
factor is desirable.
Deciphering Schematics
171
ChaptHt 5
So far, we have not covered the band-stop (notch) topology174 * for these two types of filters.
And there are good reasons—both of these circuit topologies exhibit proolems in the ba"d-
stoo regions, as well as poor notch characteristics and unnecessary gain peaking in the pass-
oand regions. Nonetheless, we will discuss them tor completion.
The Sallen Key topology on the right implements
a second orde' band stop filter with one pole and
one zem in its transrer function. One advantage of
this circuit, besides circuit simplicity (1 op-amp, 5
resistors, and 3 capacitors), is the small ratio
between tne largest and the smallest resistor, and
cf the capacitor values as well.
While the Sailen-Key topology is widely used in
low pass and high-pass filters, it has some serious
drawbacks for band-stoo implementation Apart
from the difficulty in tuning due to interaction of
сз
component values on the center frequency and Q-factor, there is also open-ioop output
resistance interference when trying to achieve the ideal notch-filter characteristics. Due to
these shortcomings, the Salien-Key notch filter is not a favorable topology foi banc-stop filter
construction.
The multiple feedback (M^B) topology shown below also implements a second order band stop
filter. Besides a simpler BSF design (1 op-amp, 3 resistors, and 2 capacitors) in the first stage,
it provides a summing function in the second stage to combine the high pass and low pass
responses.
Again, there are serious drawbacKS for this topology. The dependence on the transfer function
of the op-amp parameters is greater than the Sallen-Key realization. There is also a‘fficulty in
generating high-Q and high frequency because of the limited open-loop gain of the amplifier
at high frequencies.
174 Many applications such as tone-signaling, audio signal processing, hearing-aid feedback, or mains rejection
systems, require band-stop filters to eliminate undesirable signals and noises.
172
ANALOG CIRCUITS
Elements of Analog Circuits
James Bainter came up with a topoiogy that is not dependent on component matching but on
the gain of the op-amps. This overcomes the temperature drift and aging affecting the Q of
the notch that is inherent in the Sallen-Key and MFB filters. In fact, the component sensitivity
ol the Ba nter filter is exceptionally low. The design uses three amplifier circuit clocks with two
feedback looos (see overleaf figure).
The first stage (Al. R1-R2) serves as an inverting amplifier, the second (A2,R3,C1) a low-pass
filter, and the final stage a summer (A3, R7-R8) that combines the second stage output with a
nigh-pass filter (C2, R6).175
One of the mosi versatile yet o'ten overlooked filter topologies is the state variable filter. The
oasic design is shown below:176
175 A sixth order filter can be formed by cascading three of these second-order filters in series to produce a clean
stabilized notch Bainter band-stop filter that surpasses the Sailen-Key and MFB filters in performance.
176 Its versatility is seen in the various schemes tha* allow the Q (bandwidth;, frequency and gain to be changed
easily by jus* varying the resistoi values. This filter type has several variations—signal can be applied to the
inverting or non inverting input of the first stage, Q and frequency can be changed without affecting the gain.
Deciphering Schematics
173
ChaptHt 5
The first stage is a summer which adds the outputs from two integrators that follows in the
next two stages, ana produces a high-pass output. The second stage integrator produces a
oand-pass outout while the third stage integrator handles the low-pass filtering. The center
frequencies of these two filters are set by R6/C1 and R7/C2, respectively.177
The Biquadratic (Biquad in short) filter is a close relative of the state variable filter, so namea
Decause its transfer function is quadiatic in both the numerator ana denominator. It is a slight
modification of the state variable design with one significant difference—there is no mgn-
pass output. Instead, there are two low-pass outputs (one m-pnase and one out-of-phase) plus
an inverted band pass output.178
LPFI = Out-of-Phase, LPF2 = In-Phase, BPF = Inverted
The last filter topology we want to look at is theTwin-T notch design, which 'S effectively a 2nd
order band-stop filter. There are two variations—a single and a dual op-amp configuration.
177 Generally, state variable filters are good for second order design but run into problem for higher orders due
to the difficulty in obtaining multi-gang resistor pots necessary for tuning the frequency responses.
178 By including a fourth stage, an additional high-pass, notch, or all-pass filter can be realized.
174
ANALOG CIRCUITS
Elements of Analog Circuits
The first tor single) op-amp acts as a buffer, ensuring that the output of the filter is not loaded
oy the voltage divider. The second op-amp applies feedback via the R and 2C leads of the tee
junction, enabling the initial roll-off to be closer to the notch frequency. 2R and Care the tuning
components, and it's common for one of the R and the 2R to be formed using a fixed resistor
and two (or more) potentiometers. The idea is that at the nominal tuning frequency, the two
Dots will oe centered, allowmg fine and very fine adjustment. However, it can oe difficult to
maintain a goed notch because of minute amounts of frequency drift.
Simulated Inductor
LC Titers are common building blocks in many passive filter applications. But inductors suffer
from the following issues—they are bulky and Dick up noise easily from any nearoy magnetic
field source One way to overcome these deficiencies is to use simulated inductor to replace
physical inductor via an active circuit to produce an equivalent inductive reactance.179
C1=100N Rl=100 R2=100K R3=1K
SH = SIMULATED INDUCTOR
(A) TRANSISTOR VERSION
(B) OP-AMP VERSION
Frequency (Hz)
The simulated inductor (SH) above has a nominal value of 1H though the transistor version
tends to be slightly less because the emitter follower has a gain of O.SS instead of unity. This
explains the response curves which show tne op-amp version to have Defter performance.
Digital Filters
Wh.le an analog filter uses electronic components to form a circuit topology tnat achieves ihe
desired filtering effect on a discrete signal, a digital filter depends on a signal processor (DSP)
to perTo--m numerical calculations on a digitized sample of that signal to attain the desired
-esult. Since digital filters are software-based, there is no topologies mvoived only algorithms
179The simulated inductor has functional performance comparable to a physical inductor with added advantage
of easily implementing a larger inductance value with a wider adjustable range, less the bulkiness and noise of
physical inductors.
Deciphering Schematics
175
ChaptHi 5
m the forrn ol codes targeted tor specific DSPs used. Therefore, we will not discuss this type
of filters as there is no circuit tc decipher.1813
Summary
Deciphering analog circuits can be tricky and challenging due co the vast numoei oi discrete
components involved, with or witnouttne integrated devices. Feedback loops and cascading
stages may further complicate the process. Therefore, familiarity with analog circuit topologies
is one crucial key in identifying tneir primary functions and the supportive roles tney perform
in the overall design schema.
The circuits and topologies presented in this chapter are not complete but comprehensive
enough to give readers a basic understanding of analog circuit designs, and hopefully oroad
in its coverage on essential aspects of fundamental analog elements (transistors. MOSFETs,
cp-amps, etc.) and their applications (switches, amplifiers, comparators, filters, etc.).180 181
As Bob Dobkin, the designer behind the LM118 op-amp, once saia:
Undeistanding an anaiog design is like understanding a language.
It doesn't Таке long to look at a schematic and know what it is all
about if you know the language.
Learning the language though, is the challenge. Just like some languages
are easier tc learn and pick up while some others may take longer tc
master, so learning to decipher analog circuits will definitely be much
harder than digital circuits for sure.182
Sometimes you may need to rely on intuition to teel around a schematic instead of rigidly
applying fixed rules to тале sense of it. Like any language wnich gers netter with use, so the
nest way to understand analog circuits is to walk through a real-world example, which is what
we wdl do in tne next chapter.
180 There are two fundamental types of digital filters: finite impulse response (FIR, and infinite impulse response
(HR). FIR filters can achieve performance levels which are not possible with analog filters out require powerful
DSPs, HR filters tend to mimic the analog filters and make use of feedback and can be implemented with fewer
coefficients than FIR filters.
181 These are at best representations in their fields of interest and not meant to be detailed treatments that
involve in-depth analysis or mathematical calculations.
182 If digital designs are thought of as either black or white with no fuzzy gray areas beiween these two colors,
then analog design, according to Samuel Wilensky. is the art of working in those grav areas.
176
ANALOG CIRCUITS
6.0@cipbi@nng blog Circinibs
Introduction
I cannot emphasize enougn the need to De familiar with the various analog elements ano their
circuit topoiogies when oecipnering analog scnematrcs. Digital circuits usually have clear
signal flow and device correlations so it’s easy to trace and make out their functions.183 Analog
circuits are not so clear-cut due to the large amount of discrete component clusters involved
and the way they aie .interconnected, which can obscure the topologies due to awkward signal
muting and component placement in the schematic diagrams.
For our exercise, we will work on a three-page schematic d agiam featuring an ‘SPA184 Power
Drive Card'. You will be pleasea to know that it contains many of the analog elements that we
covered in the previous chapter. Notably, much ol the schematic comprises op-amp circuits
depicting various functionalities, so it's a good candidate to study. Again, take some time to
go through the schematic diagram and see how much you can decipher oefore you continue
read.ng. You can refer to the previous chapter or look up Appendices C (Filters) and D Юр
Amps) for assistance if necessary.
'deciphering Steps
Besides bearing in mind the generic steps outlined m Chapter 4 for digital circuits, there are
three additional points to take note for analog circuits:
•	Mark out the power ana ground references
	Segregate rhe schematic into functional clusters185
	Identify circuit topologies
183 The exceptions are ‘black box' devices such as ASICs and progiammable logic arrays with either generic
signal names or none at all. At best, you can inter from the known devices they are connected to and back-
annotate to reconstruct their signal identities. This technique is covered in my boon, Manual PCB RE: The
Essentials, in which I reverse engineered a Gigabyte GeForce graphics card and in the process recreate its GPU
pinout signal names.
184 SFA stands for stabil.zed olatfomn assembly which is used to carry a payload comprising sensors employed
in surveillance-related missions.
185 The 'dlvlde-and-conouer1 strategy is very useful when deciphenng analog circuits.
Deciphering Schematics
177
Chapter 6
178
ANALOG CIHCUITS
Deciphering Analog Circuits
CC/K CC4VLRTV? CIRCUIT
MUt UUESS ОТ№Р*П£ SPECIFIED, ALL C«FACtrCFS ARE В 1UF
TITLE:	SPA PO'i'ER D	RIVE Card
DWG NO:	6011.3825.02.014	RE'. 02 SHEET , or 3
С	|	В	I	A
Deciphering Schematics
179
Chaptei 6
SV<H SUK WM« С1ВС1ЯТ
H	C	f	£	.... “I
180
ANALOG CIRCUITS
Deciphering Analog Circuits
НИ РСМИ НЕГСТОС1 «UhVIJKHZ
		TITLE:	SPA POWER DRIVE CaRD			
		DWG NO:	6011.3825.02.014	REV:	02	SUSI 2 or J
0	c		8	*		
Deciphering Schematics
’81
Chapter 6
182
ANALOG CIHCUITS
Deciphering Analog Circuits
TCF^f НОТС* COMIBO CIRCUIT
pitch
£€K> o/r
FITCH
FIKE GAIH
Hl PITCH
FIK
loW
Yaw
CEMD C/P
YAW
fthE W14
Hl fvt
TITLE:	SPA POWER D	RIVE Card
DWG M):	6011.3825.02.014	RE. e2 SHEET: 3 or 3
В	|	A
Deciphering Schematics
'83
ChaptHi 6
Preliminary Data
Let s try to gather some data and familiarize ourseives with the schematic diagram. We will
scan each sheet and see how many items we can identify at first sight.
Sheet 1 of 3
In terms of power, there are:
±15V supplies and analog ground
+28V IN and sw with 1 loating and switched grounds, respectively
Quad single-pole single-throw (SPST) IC (U7)
Relays K2 and K5 with protection diooes (CR16-CR17) and a latch-on diode (CR18)
A DC/DC Convert Circuit cluster comprising:
Waveform generator (U8)
A pa.r of switching drivers (QI -Q2. Q5 and Q3-Q4, Q6)
Custom mult.-turn transformer (T1)
Two bridge rectifiers (CR1-CR4 and CR5-CR8) and tneir filters
Pitch ano Azimuth Coarse Motor Control Circuit cluster:
Op-amp relay comoo (U9, КЗ and uiO, K4)
PWM Power amplifiers (U14 and Lil 5)186
-28V power drive circuit (Q7-Q8)
Sheet 2 of 3
Gyro Spin Dr.ver Circuit, comprising.
Switching amplifier (и 13) and four Darlington pair drivers (QI 2-Q19)
400Hz reference
PWM Power Reference:
4-quadrant PWM reference waveform generator (U11 -U12)
Sheet 3 ot3
Pitch and Azimuth Fine Torque Motor Control Circuit:
Op-Amp notch filters compensation and integrators (U1 - U2 and U4--U5)
PWM Power amplifiers (J3 and U6)18b
l have included labels for various circuit clusters as well as their component functionalities to
make it easier for identification Hopefully, as you do your part in studying the scnematics. it
will give you a better idea wnat features to loon out for when identifying the topologies and
determining their purposes
186 If you ve tried finding the datasheet for these devices, you would realize that there is none availaole online.
This is because they are custom-made parts, hence no information has been provided by the man ufacturer.
184
ANALOG CIRCUITS
Decipher.ng Analog Circuits
Marking Out References
The first step in deciphering analog circuits is to make
out the oower and ground references, much like what
we d’d with the digita. example in Chapter 4. Since many
ana og designs contain op amps, it is not surprising to
find the ±15V power rail on the boarc we're studying,
along witn an analog ground (GNDA).
But unlike digital circuits which g'Oup all the decoupling
capacitors to their powei grids (+5V, +3.3V, +1.8V, etc.)
often we’ll find only the primary filtering capacitors— a
large electrolytic capacitor (micro-Farad range) to curb
voltage noples. and a smaller one (nano-Farad value) to
remove high-frequency noises.187
This does not mean that analog ICs do not require decoupling capacitors; rather, it is common
practice to place these capacitors within range of their respective ICs. We will see this when
discussing the circuit clusters.
Moving down, we see two sets of +28v—a main input (IN) ano a switched (SW) output:
187 Analog components and circuits are sensitive and susceptible to noises that not only degrade performance
but produce unwanted interferences as well.
fjaVRtN
CO
Deciphering Schematics
185
ChaptHi 6
Aviation engineers will know that all aircraft eiectncal systems are powered by two primary
sources—a 115V 400Hz ac and a + 28» de,188 189 the former is provided by either an engine-driven
generator or an alternator, and the latter by a separate transformer-rectifier unit. Since the
SPA power drive card is part of an electronic module that is fitted onboard an unmanned
airborne vehicle (UAV), its operating powei is derived bom these two sources.
On Sheet 1. we see that the <-28v input (+28VIN) goes through a cascade of two relays (K2 and
K6) before powering tne board as a switched output (+28VSW). K2 is a power feed relay which
s first activated when the PLAT ON CMD’18S goes low; its output in turn energizes K6 and latches
the +28VIN out to the DC-DC converter as -‘28VSW.190
г 4k	i
(A),	(F)	(S)
Analog Ground Floating Ground Switched Ground
Notice that beside the analog ground (GNDA) there are two additional grounds—switched
ground tGNDS) and floating ground (GNDF). It is not unusual to have the main power supply side
releiencing a ground that is not connected to a common or earthed point. This is to isolate
sensitive circuits from interferences caused by ground loops. The +28VIN as a derivative of
the aircraft generator, is often noisy ano may affect the reliability and performance of circuits
if connected to a common ground. The switched ground is also differentiated from the floating
ground and budged by a fuse resistor of 0.300 ohms for safety measure.
The <-28VSw switched supply is used to power the PWM amplifiers and Gyro Spin Dnver circuit
clusters, and also to produce the -28V voltage required by the PWM amplifier modules. A pair
of ±7.5V is required for the final stage MOSFETs o* the Gyro Spin Dnver cluster (more of this in
our discussion later).
Mapping out tne power requirement of an analog board is a crucial first step to deciphering
its schematic diagram. The nexi step would be segregating (or isolating) the circuit clusters to
get a better idea oi the o'gamzation of the schematic diagram.191
xss 26V ac is also used in some aircraft for lighting purposes, where tne powei is generated by a commutator
which regulates the output voltage of the 28V de.
189 Platform ON command signal.
190 A latching relay circuit maintains its condition after being activated, which is why it is also known as a keep
relay, stay relay, or impulse relay. It is usually employed where power consumption and dissipation needs to be
limited.
191 Not all analog designs can be cleanly segregated into isolated clusters or clear-cut circuit entities by reason
of their functionalities. The difficulty increases if the schematic diagram is poorly organized or laid out due to the
peculiar style of the circuit designen or even the oesign tools used.
186
ANALOG CIRCUITS
Deciphering Analog Circuits
Segregating Circuit Clusters
The SPA Power Drive Card incorporates a DC-DC converter, compensation and driver circuits
tor payload units mounted on the staOihzed piattorm assembly of a surveillance UAV. We will
rook at each ot these (unctions by their relevant circuit clusters ano come up with some simple
olock diagram rep esentations.
DC DC Convertor (Sheet 1)
This is perhaps the easiest circuit cluster to spot or identify, evident from the presence of
elements such as the switching transistors, a multi-turn step-down transformer, and bridge
rectifiers. Of course, a switching oower converter requires some kina of tree-running oscillator
to operate and 1 his is provided by the U8 op-amp trio sub-cluster.
Pitch and Asimuth Coarse Motor Control Circuit (Sheet 1)
How do we ascertain the functionality of a larger Circuit cluster? By following the signal flow
right to rtsendsTage. A clear schematic diagram is well labelled with informative signal names
from start to finish. We can infer from the identical form of the pitch ar.d azimuth circuits that
both perform similar functions, but controlling the UAV in terms of pitch and yaw movements.
Pitch
Coarse Motor
Yaw
Coarse Motor
The PWM amplifiers at the final stage with their affiliated signal labels indicated coarse motor
control, ot which the orecedi ng stages conditioned ana compensated the input control signals
oefore driving the final stage.
Deciphering Schematics
187
ChaptHi 6
1 he phase corrpensati ng network is used to minimize overshoot and increase the steady state
accuracy of the system. This is especially important for motor control on airborne systems.
Servo ON Analog Switch (Sheet 1)
This is basicady a quad analog switches (U7) that is controlled by a single SERVO ON command.
It is used to activate the foui PWM amplifiers
Gyro Spin Driver Circuit (Sheet 2)
A gyroscope is a senso' dc-vice that monitors rotation and is widely used in aircrafts, satellites,
automobiles, riooile phones, cameras and even video game controllers. Therefore, it is no
exception that the UAV comes with such installation and requires control signals to operate
them.
Gyro Heater Sink Driver Circuit (Sheet 2)
Tnis cluster of driver circuit provines power to an external gyroscope hearers with feedback
from a thermistor that is located inside the gyroscope.192
192 Airborne gyros are susceptible to wider temperature changes due to the atmospheric environment they
operate in. Io maintain stability and reliability, these devices usually have heaters to леер operating temperature
constant.
18a
ANALOG CIRCUITS
Deciphering Analog Circuits
PWM Power Reference Circuit (Sheet 2)
This circuit cluster generates tour triangular waves that are phase shitted by 90° from each
other and used as reference signals tor the PWM power amplifiers.193
Inverting
Op-Amp
f PVJM-0
к pwm-iei
Inverting
Compactor
Integrator
(Phase Shitted)
Inverting
Op-Amp
► PWM-279
» PWM-90
Pitch and A?imuth Fine Torque Motor Control Circuit (Sheet 3)
This is the biggest and most complex circuit cluster in tne whoie schematic. The Pitch and
Az muth sub-cluster each includes a series of notch filters, а юор compensation network
switched gain setting, an integrator ano a PwM power amplifier stage.
Pitch
Demo
Yaw
Demo
Pitch
Fine Torque
Yaw
Fine Torque
Wh ile it is not necessary to come up with functional block diagrams to decipnei schematics,
doing so has several benefits—it gives you a better understanding oi the signal flow and at
the same time helps you organize the circuit clusters; it’s aiso a preparatory phase in which
you make notes for later reference when you enter the deciphering pnase.
193 The general idea here is to evenly spread the power consumption of the amplifiers and motor loads over the
wave cycle and tc reduce crosstalk between amplifiers.
Deciphering Schematics
189
ChaptHi 6
Identifying Topologies
Now that wc have a better idea of how the circuit clusters are formed by their functionalities
and signal flows, we can relate each sub-section of the block diagrams to the actual circuit
construct and ident.fy the underlying topology, if any. Let’s begin with the switching waveform
generator of the DC-DC converter:
U3 is an LM1 39a quad voltage comparator IC operating from a single +28v supply. The pair of
complimentary waveforms required by tne switching transistors are provided by three of tnese
comparators, u8a U8B and U8C:
U8A is configureo as an astable oscillator circuit using an RC feedback network, R190 and
C77194 which produces a square wave output that drives a window comparator circuit U8B and
U8C with two separate outputs—inverted (A) and non-inverteo (B), v>a a common RC low pass
filter (R104 C92). The two complementary outputs each diive a pan of pjsh-pull transistors
(Q1-Q2 and Q3-Q4) which in turn dove the final stage MOSFETs (Q5 and Q6), respectively.
+28V	-28V
<F)
tD (O
194 An astable circuit has two states, neither of which are stable as it is constantly switching between these two
states tne time spent in each state is controlled by the rate of charging and discharging of the capacitor through
a resistor.
190
ANALOG CIRCUITS
Deciphering Analog Circuits
The drain terminals ot Q5 and Q6 are used to drive the primary windings of T1. whose secondary
windings are fed to two bridge rectifiers (CR1-CR4 and CR5-CR8) to produce a single -28V and
a dual poianty 7.5V output voltages, respectively.
That completes the DC-DC converter cluster. How many topoiogies did you manage to identify
cased on our discussion above?195
Next, let's look at the servo ON analog switch.196
SERVO ON CM)
3
4
5
_6
15
Mi
A1
A2
A3
A4
13
02
03
04
St
S2
S3
S4
«15V-15V
VOD
VSS
U3.7
-И_ u6.7
U14.7
(PITCH COARSE)
(YAW COARSE)
(PITCH FINE )
U15.7 (YAW FINE )
AD7510
GND
U
10
гт;-о’
1
U7 (AD7510) is a quao analog switches with all its drive (Э) inputs tied to ground and address
(A) inputs tied to a common control signal, SERVO ON CMD. Each sense iS) output is connected
to the inhibit (INH) input of a PWM amplifier.
195 Astable multivibrator, window comparator, low-pass filter, complimentary push-pull BJTs. N-channel MOSFET
switches, and two tull-wave bridge rectifiers—with single and a dual polarity outputs.
19e Although we constructed the functional block diagrams based on the order of circuit clusters' appearance in
the schematic diagram sheet number when it comes to deciphering them it is not necessary to follow the same
order. Rather, it is more important to follow the logical flow of related signals from cluster to cluster.
Deciphering Schematics
191
Chapter 6
When SERVO ON CMD is driven high, the sense outputs will follow the drive inputs and become
low, enablingthe PWM amplifiers to operate. As indicated, two sense outputs control the coarse
pitch and yaw, and the other two controls the fine pitch and yaw PWM amplifiers. There is no
topology involved here.
What do you think is the next cluster we should touch on? If you guess the PWM power reference
then you're spot on!
RI4S
4K99
из. I (PITCH COARSE)
-UW.1 (PITCH FINE )
15V
into
DPI I
RI45
iwc •
RI44
113.4
R143
26KI
R140
2(X5
11 till*
CPU
♦ 15V
Teas
U123
LM139A
isv
C106
15V
R142
RI47
I62K
UI2A
LH139A
= U15.I (YAM FI*£ )
+I5V
I
R146
SKI 3
-к-----
RI5.3
lift
14
U11B
0*11
U1IC
CPU
R1S5
4K99
UI2C
LM139A
(YAW
COARSE)
R154
1ЙК
RI52
39K2
cue
U12D
LM139A
Tms cluster is made up oi two types of ICs, an LM1 39a (u12) quad comparators and an 0P11
quad op-amps (111 1). Notice that only two oi the four comparators are used.197
As noted earlier, this circuit generates four triangular waveforms with a 13Kriz frequency and
an amplitude of ±10V. The waveforms are phase shifted Dy 93 degrees from each other for the
purpose of spreading the powei consumption of the pwm amplifiers and motor loads across
the wave cycle ano also to reduce crosstalk between them.
Let's consider how these waveforms are generated. The two comparators Л 2A (non-inverted)
and U12B (inverted) have reference inputs grounded so the.r outputs will swing between the
positive and negative rails as the respective signal inputs go above or be.ow zero voits, thus
orouucing ooposite polarity square waves
197 Circuit designers usually placed unused elements of an IC near those that are used or simply grouped all
unused IC elements togethei But some may choose to simply omit these unused elements in their schematic
diagram to reduce clutter.
192
ANALOG CIRCUITS
Deciphering Analog Circuits
The non-inverted square wave ofU12A is ted to U11A which
is an op-amp integrator whose triangulai outout, formed
by the charging and discharging of C105 in turn drives the
inputs of both U12A and U12B, and the input of inverter op-
amp U11D. If we take the output of U11A as reference (0°)
then U110 s output will be 180° out o‘ phase.
in 2B output will be a square wave that is the invert of Ш1A
output, whicn is fed to U11B, another oo-amp integrator
which produces a tr.angular wave that is lagging 90° to
that of U11A. Ш IBs output is then inverted bv U11C to
produce a triangular wave that is lagging Л1А by 270°
(90"+180°). With that, we have the four triangular waves
that can be used as the PWM reference signals
+ 15...
+ 10
0 - -/-
-10 Z
-15
U12A---- U11A------
One question naturally comes to mmd—now does the U11 a
op-amp integrator produce the desired ±10V triangular wave
from the near rail-to rail square wave generated by tne in 2A
comparator? The answer—by adjusting the time constant
(RC) of the integrator such that it is greater than tne period (T)
of the square wave, such that T < RC.198 Though no value has
been provided for Ci 05. we can infer that since the ratio of
the triangular to square wave amplitude is 10/15 = 2/3. then
based on the 13KHz frequency:
T = 1/13000 = 76.92uS
2/3(R144)(C105) = 0.5T
2/3(113K)(C105) = 0 5(76 92uS)
Thus, C105 = 0.51 nF
Integrator U11В contains an additional bndged-T network (R151-
R152. C110) n its feedback oath This is a low-pass filter which
douoles up as a shunt resistance across Cl 11 to stabilize the
triangular wave. As with most op-amp based oscillator, the slew
rate of the op-amp is a limiting factor on the frequency of the
triangular wave Sometimes, an offset voltage-compensating
network may be added to the non-mverting input of tne op-amp
to further improve performance.
ci 11
Й14/
162K
RI51 R152 I
J9K2 ? 39K2 I
:iie
el"—
And that compjetes the pwm power reference muster. This time, how many topologies did you
manage to identify?
198 According tc Ramakant in his book, Op-Amps and Linear Integrated Circuits, for the integrator output to be a
triangular wave the time constant to penad ratio should be at reast 5CR > T/2 ipp. 328).
Deciphering Schematics
’93
Chaptei 6
We now come to a more challenging but no less interesting section:
The coarse motor contro1 circuit has two nearly identical sections related to the pitch and yaw
tor azimuth) motion. And as we saw in the earlier block diagram representation, each is made
up of thiee sub clusters.
	Phase compensation network
•	Loop integrator (with reiays;
•	Power amplifier
We will use the pitch section for our discussion and omy mention the yaw along the way when
there is a distinction or deviation
Tne pitch fine pot signal first go through a low-pass filter (R120, C88)to filter off high frequency
noise and is then fea to a voltage fohower (U9A). Tne yaw fine pot section does not have a low-
pass hlter which seems to suggest that it has iess critical requirement compa'ed to the pitch
movement control.
194
ANALOG CIRCUITS
Deciphering Analog Circuits
Next up is a phase compensation network comprising a series RC (R121, C89) in parallel with
resistor R122 at the inverting input of integrator U9B, which forms a phase lead-lag network. A
lead compensator can increase the stability or speed of response of a system, while a lag
compensator can reduce (but not eliminate) the steady-state error.199 The third stage before
the final power amplifier is a loop integrator U9C. Notice that capacitor C97 has one element
of relay КЗ connected across it, as is the corresponding yaw section’s loop integrator U10C and
its capacitor Cl 19 with the other element of the same relay.
Relay КЗ is controlled by the INIT CMD signal which if energized, causes C97 to discharge via
R135 and Cl 19 to discharge via R156, respectively. This has the effect of zeroing the outputs
of both loop amplifiers whenever an initialization command is issued by the UAV system. The
yaw section’s loop integrator U10C has an additional relay K4 element connected across C119
and is controlled by a FLIP CMD signal. When energized, it converts the loop integrator into an
amplifier with constant gain, thus driving the azimuth axis at a higher rate when a flip
command is issued by the UAV system.
ie?k
сшТ
°I7-
CH
Uli
11
15V-1SV
A170
*28V
499
3
28VS
CIN
A
R168
R174
.499 ,
97K6
U7.10
AIN
INH
НН1-144Э
VSSEN
hVSS
Ivss
-28V
IRG*
28V5
OUT I
RIN
cur?
+ I5V
-I5V
2G_
19
HI
-W
N/C
N/C
GAOA
YAH COARSE MOTOR
The oov.er stage PWM amplifiers U14 and U15 are usea to drive the pitch ana azimuth coarse
motors, respectively. Tnese two PWM amplifiers have sauare wave outputs with varying duty
cycles which are effected by the phase shifted triangular waves from the PWM power reference
cluster discussed earlier, fed via the TRGW inputs (E and F).
Note tnat the PWM amplifiers work cn ±28v supplies and have voltage sensing functions via
resistors R130-R132 (U14) and R170-Ri 72 (U15), respectively. Since there is no information
available, that's as much as we can make of this device.
And that moie or less covers the coarse motor control circuit.
199 Depending on the effect desired, one or more lead and lag compensators may be used togetner in various
combinations.
Deciphering Schematics
19b
Chaptei 6
Smnlaily, the tine torque motor control circuit has two identical sections related to the pitch
and yaw (or azimutn) motion. Unlike the coarse motor control, though, each section has four
sub-clusters instead of three:
	4-stage notch fillers
•	Loop compensation network
	Error integrator
	Power amplifier
Again, we will only use the pitch section for our discussion. Considerthe cascaded notch filters
sub-section belonging to the pitch control below:
There are altogether four stages of filtering You may wonder wny tnere s a need for so many
filters nere Besides stability and steady state erroi consiaerations pertaining to gyroscopic
motor control of a UAV system, ihere are other factors that must be addressed such as the
problem of nutation200 as well as noise generated by the spinning motors.201 We know that a
notch filter is a band-stop filter which attenuates input frequencies within a narrow range.
When cascaded, however, the final effect will be the product of the frequency ‘•espouses of all
the filter stages.
200 Nutation is caused by a possible small deviation of the vector of a spinning object’s own angular momentum
from the axis of symmetry.
201 The topic of rotation, nutation and precession of a spinning object is rather involved. Interested readers may
want to look up Introduction to UAV Systems I Sth Edition) by Paui G. Fahlstrom and Thomas J. Gleason.
196
ANALOG CIRCUITS
Deciphering Analog Circuits
One ot the challenges encountered in analog circuits is missing component values; in this
case, it is the capacitors. So while we may not be able to determine the band frequencies of
the filter stages, we can still attempt at identifying what kind of topologies they belong to.
The first stage is a multiple feedback (MFB) bandpass filter (U1 A) that removes high frequency
noises generated by the spinning motors. I know, it doesn't look anvthing like what has been
covered in the previous chapter. Tnat's because I dia not indude all the possible MFB filter
variations. Besides, real-world designs can have many adaptations ano deviatons from wnat
is taught in classtoorns using standard models. It may be uncomfortable for readers looking
for sb a ight answers or obvious similarities but unfortunately that’s not how it works in real
world circuits.
We can. however, take the cues from the standard mfb BPF
model on the right and try to correlate with what we are
deciphering. There are two feedback paths through R2 and
Cl; R1/R3 and C1 provide the low-pass cut-off response
while R2 and C2 handle the nigh pass cut-off response. We
thus have a band-pass resulting from these two cut-off band
frequencies.
Tne standard mooel is an inverting MFB BPF; the first stage of the circuit we're deciphering is
a r.on inverting type so we reed to re orientate ourselves a bit. There are two feedback paths
— one via C1 to the non inverting nput of di A. and the other via C3 and R3 tc its inverting
input. The low pass cut off response is thus provioed by R1 /R2 and C1, while C2/C4 and R216
handle the high-pass cut-off response.
The next three stages are basically non-inverting twm-T notch filters, the first and third being
single op-amp types whiie the second is a dual op amp configuration
You may be confused by the array of resistors and capacitors that seemingly exceeded the
number found in the above siandard rwin-T models. But it you use the voliage divioer as a
'eierence and look closer, you will discover that they are essentially the same thing.
Deciphering Schematics
197
Chapter 6
Here are the equivalent components in tabulated form:
	2nd Stage	3rd Stage	4th Stage
Ri	R9	R17	R24
R2	rib	R18	R25
R	R7.R8	RI 4,Rl5	R19.R20
C	C6,C7	C8,C9	C13.C14
2R	R4.R5	R12,R13	R21,R22
2C	C82.C83	C10,C11	C15,C15
I hope by now you have discovered that R and 2C are really a pair of resistors and capacitors
instead of a single component depicted in the standard models. There is no hard and fast rule
that it has to be exactly what is shown on paper; sometimes hardware designers have their
reasons for such implementations, perhaps not just for the sake of reducing inventory by using
similar valued components, but for design and layout considerations as well.
Next, we will look at the compensation network and integrator sub-section:
♦15V	GAIN ADJUST
AD7512
1 - -15V
2 - GNOA^7i
7 - *15V
U16A	।—
R2M AD7513
PITCH FINE WIN —4----------------£>O-y Il
STABILITY
4TH STAGE
NOTCH —
FRIER
COMPENSATION NETWORK
Э0К9
9
10
_ C26
R37
6Ж4
U2C
DP11
ШК
R39
45K3
INTEGRATOR
TO P«H
AMPLIFIER
R38	f- ye
1Ж> -J-GZS
L— TO ACOniDNAL VOLTAGE FOLLOWER
The phase compensation network, comprising U2C and its associated discrete comoonents.
is similar to what was d.scussed in the coarse motor control sub-secton earlier, but with the
added option of inserting a voltage follower (not shown here) with an extra wire link at jumper
JU1 Analog sw tch U16A provides gain adjustment to compensate for changes in the payioad
sensor configuration by increasing the amplification factor of the integrator in the next stage
Integrator U2D is an odd ball with an added RC network (R40 and C28) on its feedback path
unlike the normal single resistor to limit the DC gain. The idea of this topology is to shape the
control loop for stabilization by introducing a phase and gam margin.
198
ANALOG CIRCUITS
Deciphering Analog Circuits
The final stage PWM amplifiers tor the tine torque motor control section is similiai to that of the
coarse motor control section and will not be repeated here. A few takeaways from deciphering
ooth motor control clusters:
	Read up and get acquainteo with as many topologies and their vanations as possible.
Handbooks, periodicals and circuit design articles are rich sources of information and
ideas to widen your unoerstanding and perspectives.
	Sometimes you need to think out of the oox and ouild upon what you have learned
insteaa of relying on bas.c dassroom models.202 The twin-T notch filters are examples
of what I'm driving at—don't be too straight, rather, be flexible.
	Lack of information may seemingly limit your ability to decipher a circuit, but don't call
it quit too soon As vour experience improves with greater exoosure. you will be able to
work around these obstacles. The pwm amplifiers proved what I just said.
We re left with two gyro-related circuit clusters to decipher. Let’s get on with it!
First up, the Gyro Heater Sink Driver Circuit.
«>enz и- w-T---,2L'"x
iwx I	-<-'* r
SR2T3	13 _	2K
ин..н,
M—"—	<T,
Mil R210	4
.2K15 TOOK
1 1
<5)
— THEh-IISTCfi FEEOBAC-
This is a straightforward circuit. A 400Hz square wave reference signal is used to provide the
switching voltage that turns a N-channel MOSFET switch Q20 on and off. This input signal is first
reduced by a voltage divider (R212-R213) to an appropriate level and fed to a non-inverting
integrator which converts it into a triangular wave. Diode CR12 then clips off the negative cycle
of the transformed signal befdre driving 020. Tne drain of Q20 is connected to the return path
of a neatei eiement that is integrated into the gyroscope, which maintains an optimal working
temperature for the gyro assembly.203 A thermistor, located inside the gyro assembly, provides
feedback tc regulate the heatei at a constant temperature.
Notice the ground symbols marked (F) and (S) for floating and switched grounds, respectively.
In a sense, the UAV is airborne and not connected to any earth po.nts, thus it’s not a stretch
to say that all ground reierences onboard are ‘floated
202 Not that these are nor important but they serve only as foundational knowledge for you to advance to the
next level of proficiency. Get the basics right but don't just stop there.
203 This is necessary because of the cold atmospheric condition in which the LAV operates at high altitudes.
Deciphering Schematics
199
ChaptHi 6
Switched ground refers to the aircraft +28Vdc power that is denved from the engine generator
which can be quite noisy and may affect sensitive circuits on the UAV. This is the reason for
the different ground references. Since the gyio heater element is likely using the +28V for its
cower supply, so the Q20 source is connected to switched ground.
Last but not least, we have the Gyro Spin Driver Circuit:
Here we see a pair of two-phase 400Hz spin command signals (0° and 90°), each feeding a
□air of window compa'atois. U13C/U13D and U13A/U13B, respectively. Resistors R208 and R188
limit the current input to the comparators, while diodes CR10 and CR11 protect them from
damage due to excessive sp.kes on tne positive cycles bach comoarator output drives a PNP
transistor which in turn drives an N-channel MOSFET with either a +7.5V oi -7 5V source. The
complimentary pair of MOSFETs Q17/Q19 and Q13/Q15, produce a two phase 400Hz square
wave witn ±7 5V amplitude that drives the gyroscope rotor.204
204 For some idea on how the gyroscope works within the gimbal platform of an UAV, refer to the Errata section
at the end of this chapter.
20D
ANALOG CIRCUITS
Deciphering Analog Circuits
It can be difficult to v.sualize how a circuit that drives the gyroscope spin motor works in the
original schematic design layout. But if we extract the power MOSFET switches and re-onentate
them with reference to the motor, it becomes much clearer to comprehend—the topology is
really that of an H bridge motor drive circuit:205
Activation of one pair of MOSFETs (Qi 3/Qi 9) will spin the motor in one oirection:
Activation of the other pair of MOSFETs (Qi 5/Q17) will spin the motor in opposite direction:
And that completes oui deciphering of the SPA Power Drive Card schematic diagram.
205 If you recall, we briefly discussed a half-bridge driver circuit in the previous chaptei \see pages 148-149).
Deciphering Schematics
201
Chaptei 6
Errata.
Gyroscope and Gimbals206
The gyroscope is a piece of equipment that can be used to create a stabilized platform in
space, a standard of reference which is the basis of all Inertial Navigation Systems. Sensors
mounted on the axes of the gimbal frames can oe used to measure the angular deviation of
the vehicle from a pre-deternnned path. Tne outputs oi these sensors can then oe used to
provide eiroi signals in a feedback control system to bring tne vehicle back on track.
The plane of the gyrescope rotor can rotate (spin) in any direction corresponding to the frames
of the gimbals. The rotor of a gyroscope mounted in a three frame gimbals has three degrees
oi freedom and will continue to point in the original direction in space no matter how the
gimbal frames are oriented
Forces acting through the center of gravity of the gyioscope are known as translation forces
and do not change the angle of the plane of rotation but move the gyroscope as a unit. Thus
a spinning gyroscope may be moi/ed freely in space by means of its supporting frame without
disturbing the plane of rotation oi the rotor.
206 Adapted from Gyroscopes and Navigation on The Electropaedia site wnich is maintameo oy Barrie Lawson of
Woodtank Communications Ltd. l website: wwwjinpoweru k.com) Used with permission.
202
ANALOG CIHCUITS
Deciphering Analog Circuits
Further Studies
If you’re still confused or have a genuine phobia about analog electronics, the following online
free classes may just alleviate your fears on this subject:207
Offered by NESO Academy for free, this 158-module course on analog electronics covers
semiconductor basics up to power amplifiers. Each module is between 5-15 minutes in length
and is taught using electronic blackboarding which is effective in retaining focus and better
assimilation of the information presented. You can follow the course in sequence or jump to
a specific module of interest. Total course duration is about 25 hours.
207 http§;//wwYY.gla§scentral.com/cQur§g/Y9Mtube-analpg-el§ctronig§-4S2Q6/cla§§rQ9m
Deciphering Schematics
203
Н»1Й С11ЧС1Л1Т8
1. taenta о? HqlorioJ Circiriba
Hybrid circuits can refer to mixed-signal designs made up of digital analog ana sensory
elements, or miniaturized electronic circuits made up of active and passive components built
over small PCBs or modular IC packages that perform certain specific functions. The latter
can be commercial'y evalabie (ADCs, DACs, etc.), or customized for proprietary designs and
patented products.
ADCs and DACs
As the names impliec, ADCs and DACs are devices that convert analog signals to their digital
equivalent, or vice versa. The figures below illustrate their functional concepts:
+FS
7
RANGE
(SPAN"!
4
0/-FS
ANALOG
NPU Г
VCD VREF
N-BIT
ADC
O Mse
—О LSB
DIGITAL
CJTPU1
(N BITS)
VSS (A) (0)
Analog to Digital Converter (ADC)
VDD VREF
MSB о—
digital
INPUT
(N-BTTS)
N-BIT
ADC
ANA. OG
° output
LSB
VSS (A) (D)
+FS
7
RANGE
(SPAN)
J.
0/-FS
Digital to- Analog Converter (DAC)
Deciphering Sctiematics
2Ub
Chapter 7
ADCs and DACs are defined by three characteristics—resolution (number of bits), accuracy,
and speed. How they are constructed, though, will affect the performance and cost.
For ADCs, there are primarily three208 methods of construction, namely, parallel comparator
(flash type), dual slope, and successive approximat'on. Flash type aDCs boast instantaneous
conversion speed but are the most expensive due to the large numoer cl op amps involved,
and are mainly tsed in m.litary and aerospace applications. Dual slope type ADCs have the
slowest conversion speed but witn hign accuracy, ana are used in non-critical applications
requiring good measurement resolutions such as digital multimeters.
VCC I 1
12/8 | 2
CS | J
A0 | 4
R/C 11
CE | 6
VDD | 7
REFOUT [ 8
AGND | 9
REFIN 110
VSS 111
BIPOFF|12
10V INI13
20V IN 114
28 STS
27 UB11
26' DB10
25| DB9
24] DBS
23J DB7
22) DB6
2lJ DBS
20j DB4
19) DB3
18l DB2
1? DB1
16l DB0
15 DGND
Most commercially available ADCs are of the successive
approximation type which strikes a balance between cost and
performance. We’ve encountered one such ADCs in Chapter
4—the aD574a (U10).209 Below are the features:
	12-bit successive approximation type ADC
	Direct interface to S-oit/16-bit processor ous
	High-pmcision voltage reference (REFOUT)
*	Unipolar or bipolar operation
	10V/2OV full-scale coriveision ranges
	Single 12-bit oi dual 8-bit woids
•	Read or Convert command (R/C)
 Conversion status signal STS (low-complete;
• В polar offset control (BIPOFF)
In the case of DACs, there are just two construction methods: binary weighted and R-2R ladder
types. The weighted resistor method utilizes a summing op-amp circuit to ado the binary input
signals using different gains corresoondmg to their resistors. The R-2R ladder method, on the
ether hand, is made by adding combinations oi R ana 2R resistors in cascaded form io the
input of an op-amp. The former is simpler m design and requires fewer components, but
suffers from L5B distortion at higher bit resolutions. To overcome tn is problem, most DACs are
constiuctea using the R- 2R ladder inetnod.
Examples Of DACs are DAC08 (U4b), AD7225 (U1 3). AD7524 (U28), and AD7549 (U22) which are
also found in the schematic diagrams in Chaptei 4.210 These days, it is not uncommon tc find
aDCs ana DaCs embedded in microcontrolleis and signal processor chips The ATXMEGa32A4 is
one MCU that has both in its internal array of resources.211
208 There are really five major types of ADCs in use today—successive approximation (SARi, delta-sigma, dual-
slope, pipelined, and flash. For simplicity of discussion, I mentioned only the conventions1 three in this book.
209 Payload Command and Conti ol Card rSheet 3 of 3)
2io Ibid, Sheets i and 2
211 This chip is featured in the schematic diagram to be deciphered in Chapter 8.
206
HYBRID CIRCUITS
Elements of Hybrid Circuits
VLC i
tout[2
V-[3
I OUT [4
Bl [5
B2 6
B3 7
34 8
9 35
16 COMP
15]VREF-
14 VREF +
131 v+
lj'B8
11 37
10 36
Not all ADC and DAC chips follow the AD- - and DAC- part
number naming convention In our case, the AD prefix
stands for Analog Devices, the company that made them.
VOUTBП		II 24	VOUTC
vojtaQ		"23	VOUTD
vss |_ 3		"22	VDD
VREFBI4		'21	VREFC
VREF'A] 5	LT)	20	VREFD
AGND 6	CM cxj	П	A0
DGNDI 7	Q	18	A1
LDAC। 8		17	WR
DB7 l_9		'l6	DB0
DB6 10		15	DB1
DB5 [11		14	DB2
DB4 12		13	DB3
		II	
PA5
PA6
PA7
PB0
PB1
PB2
PB3
GND
VCC
PC0
PC1
33
PE3
32
PE2
31
VCC
30
GND
29
PE1
28
PE0
27
PD7
26
PD6
25
PD5
24
PD4
23
PD3
---PORT C-----
— PORT D—
— PORT E----
E

The ATXMEGA32A4
Deciphering Schematics
2U7
ChaptHt 7
Sample and Mj'd
Next to the ADC and DAC, the sample and hold (SH) device is the most essential eiement in
mixed-signal designs. In fact, converting an analog signal to its binary equivalent requires four
steps: sample, hold, quantize, and encode. Ar example of a standalone sample and hoid chip
is the LF198 shown below:
Sometimes a sample and hold chip is used in conjunction with an ADC, not because the latter
is slow out to free up processing time the analog input is put on hold until the CPU is ready to
woi к on it and retrieve the convened digital data:212
212 Pa/load Command and Conti ol Card (Sheet 3 of 3)
208
HYBRID CIRCUITS
Elements of Hybrid Circuits
Analoq Switches213
An analog switch is bilateral and behaves like an electromechanical relay without any moving
oarts. The switching element is usually a pair of N-channel and P-channel MOSFET transistors
that allows conduction in either direction when turned ON. and isolates the switch terminals
when turned OFF. Since tne signal being switched must be within the limits of rhe positive and
negative -ail supplies, analog switcnes are not suitable for high voltage switching.
Analog switches are manufactured as integiated circuits in packages containing an array of
multiple switcnes, typically two or four. Examples are tne AD7510 (quad SPST switch) ano
AC7512 (dual SPOT switch; ICs used in the SPA Power Drive Card wnich we discussea in the
previous chapter.
AD7510
VSS □
GND [2J
A1 p'
A2 p'
NC [s'
NC [б‘
VDD [7
141 SI
"l3’| 01Л1
’l2 S2
II
111 S4
"l01 OUT2
1Г9 | S3
£| NC
NC = NO CONNECT
AD7512
Analog Multiplexers
An analog multiplexer addresses an array of analog switches to
select one of multiple inputs and forward it to a single output,
since analog switches can transfer a signal bidirectionally, it
can also function as a demultiplexer. In this respect, analog
switches and multiplexers can be used for both analog and
digital signals.
The Payload Command and Control Card uses two 1 б-to-l analog
multiplexers (U18-U19) for its built-in test (BIT) sampled signals,
ranging from supply voltages (+5V, ±10V, ±15V, ±28V), to the
various pitch and azimuth control signals, as well as gyro
reference and temperature sensor outputs, etc. The outputs of
both multiplexers are tied together and at any one time, only
one output is actively feeding to the sample and hold chip.
INI 5 5
IN11 J
IN10 pre
v+
NC
NC
INI 6
INI 4 6
INI 3 7
IN12 8
24
23
22
21
20
26
25
28
27
IN9 11
GND 12
VREF 13
A3 14
19
18
17
16
15
OUT
V-
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
EN
A0
Al
A2
213 Analog switches are also known as solid-state relays. Contactless switching eliminates the problem of contact
bouncing that introduces noise as well as sticky contacts due to mechanical failure.
Deciphering Schematics
209
ChaptHi 7
Hybrid Miciocircuits
A hybrid integrated circuit (HIC)214 is a miniaturized electronic
circuit module constructed with individual devices comprising
semiconductor pans (transistors, diodes, monolithic ICs. etc.)
and passive components (resistors, capacitors, inductors, etc.)
bonded to a substrate or printed circuit board.21s A hybrid
circuit sen/es as a component on a PCB in the same way as a
monolithic integrated circuit; the difference between the two is
in now they are constructed ano manufactured. The advantage
of hyb'id circuits is that components which cannot be included
in a monolithic IC can be used, such as large value capacitors,
wound components, crystals and inductors.216
A thick film hybrid is an alternative to a printed circuit board. It is generally smaller, can be
competitively pncea in large volumes otters intellectual property protection by being fully
encapsulated, and is more 'obustthan a PCB. A nyorid can work in extreme environment (hign
neat and humidity, underwater, mechanical vibrations, etc.) where a PCB cannot.
Hermetically sealed
214 Also known as hybrid microcircuit, hybrid circuit, or simply hybrid.
215 By this definition, a standard PCB with mounted components is not considered a true hybrid circuit according
to the MIL-PRF 38534 specifications.
216 Another advantage is resistors on PCBs are mounteo whereas on hybrids they are printed, tired and can be
laser trimmed to any value.
210
HYBRID CIRCUITS
Elements of Hybrid Circuits
The main difficulty in deciphering schematic diagrams containing hybrid microcircuits is they
are often represented as black boxes. The only clue you can gather from their functionalities
is from the components they are connected to, which at the very best, is often guesswork. If
you hapoen to have a physical sample and it is not encapsulated or sealed up in a hermetic
casing, a little probing and tracmg might shed further lights, provided there are no custom
monolithic ICs emoedded on it.
A Case Study
Those who are into the -eco'ding and broadcasting businesses would no doubt have heard of
Studer,217 a name renown in the audio industry. One of its flagship products was the A80 tape
-ecording machine that reproduced nigh quality sound because of iow-noise hybrid modules
found in the design. One such hybrid module is the At 01 linear hybrid amplifier which comes
in three different packages:
STUOCR
3SO1 Y A101
STUDER |
A1O1 M001
Open board
Biack encapsulated
Blue encapsulated
The hybrid comprises four transistors, five resistorsand in the original design, a 10pF tantalum
capacitor. The circuit is a Simple differential input amplifier with a driver output stage.
217 Studer is a designer and manufacturer ot audio equipment for recording studios and broaocasters. The
company was founded in Zurich, Switzerland, in 1948 by Willi Studer. It initially became known in the 1950s for
its professional tape recorders.
Deciphering Schematics
211
Chapter 7
The input stage is implemented using a differential amplifier with low noise PNP transistors
BC860. The transistor at the negative input (pm 5) is operated in the minimum noise range of
the collector current at approximately 60uA for 10k source .mpecance. Thus, for a given input
source impedance, very low noise can be achieved. This could be the reason the a80 tape
recording sounded so good witn the A101 hybrid module.218
Summary
Hopefully, this chapter gives you some idea of nybnd circuits and why tney are found in many
product designs—primarily to d scourage theft of intellectual property and safeguard the
interest of the manufacturers. Of course it makes deciphering such schematic diagrams more
challenging and time consuming. 3ut that’s where the fun is!
We will look at two interesting examples in the next chapter.
218 For sure, wild stories about this primitive hybrid circuit Studer A101 abound on the Internet!
212
HYBRID CIRCUITS
9. Ш@с1р1лепп§ HqlarioJ Circuiiba
Introduction
These days it’s not hard to find a hybrid card. By this, I mean a printed circuit board that is
made up ot analog and digital components, also known as a mixed-signal design. The SPA
Command and Control Card discussed in Chapter 4 is one such example. A hybrid circuit, on the
other hand, can refer to either a board or chip containing analog and digital circuitries. In this
chapter, we will first look at a compact piece of test equipment—the Xmmilab-B which,
despite its size ana simplicity, is really a full-featured mixed-signal oscilloscope and spectrum
analyzer plus an arbitrary function generator packaged together.219
General Specifications:
	aTXMEGA32A4 MCU: 32KB Flash, 4KB
SRAM, 1KB EEPROM.
	128x128 backlit LCD
	PD1 interface
	RS-232 serial interface
*	User input: 2 rotary encoders, 7 tactile
switches
	DC Input: 6V to 9V
Mixed Signal Oscilloscope Specifications.
	Single-channel analog input
	Input impedance: 1 MO, 15pF
	Maximum Input Voltage. ±25V (±250V
with 10:1 probe)
•	ADC resolution: 8-bits
•	Maximum sampling rate: 16MS/s
	Analog bandwidth: 2MHz
•	Two digital inputs: 3.5V level
219 The Xminilab-B is based on the Atmel AVR A1XMEGA32A4 microcontroller which is mentioned in the previous
chapter. Since all of its functions are processed by this chip, to delve into the detail workings would require us
to study the source code, which is beyond the scope of this book. For readers interested to explore further, the
resources are readily available fordownload at the product manufacturer's website (gabotronics.com).
Deciphering Schematics
213
Chapter 8

DIGITAL
INPUTS
R54
3K
+3.5V
."J
3
2
ANALOG “
«Л J
♦ 3.5V
—T
16bHZ
27
PCT1
R19
10K
INTERFACE
R56
30 OK
R18
10K 1	1
yv
R57
—QJ-1
SERIAL ’K
NTERFACL 1
-5V
ANALOG J'
TN •
UNLESS OTHERWISE SPECIFIED
ALL CAPACITORS ARE 0.1 UF
PRO
PR1
I9 VCC
vrr
PE3
PE2
PEI
PEG
(33
37
29
SI
S2
R52
3K
300K
+5V ADdO39
453
C8
09 ’	’ R55
LM4O40A
♦2.5V
30GN0
— GND
5 PBO
? PB!
—7’PB2
Лрвз
R59 BZ1
15OK CMT-1603
3WK 1,.
—
Vv у— •
15OK
U1
ATXMEGA32A4
PD7
PD6
PD5
P04
РОЗ
PD2
PD1
POO
.24
22
2Г
20.
07
06
__o5
04
02
"Of
DO
214
HYBRID CIRCUITS
Deciphering Hybrid Circuits
DMF5008N
XMINILAB-B
VIN
6VDCI I NBRX130
U13
Il IN	OUT
J ON/OFF
,	BYP
2 GND
LP2985IM5 J'
5________
4___
C34
♦3.5V
OUT
+5V
8 T
, GND GND
J- GND GND
q ON/OFF NC
MC33375D
' 4 ic25 Д
4 4- <
U7
2
5
-5V
IN OUT
 C16 C7 I"
ми 3.3Ut_ j CFY.
TPS60403
±C57 C6
rrlOU
CLK
D7
D7
06
05
8
“T
10
IT
12
D4
Оз
D2
01
DO
U4
IN
27
tlV
R34
+5V
1.5 TO 3.5V
R24
. 1011 R30
4-----wr'
±C27 WK
ISP
R61
10K
R62
10K
0 TO 2V
C40
Г15Р
D4
03
D2
DI
DO
18
OE
+VS
<vs
♦ —^|+V5
18
C,4T и
•__14
I 19

AGND
ACND
, AGND
J AGND
REFT
CM
LPBY
LNSY
REFB
22 ; '
26.Я
C13
21
CIO
25
24
+3.5V
R27
R26
R25
R24
R20
R21
R22
R23
3K
7K5
15K
30K
75K
150K
3D0K
750K
R27
-2 TO 2V
4
R25	_5

R21
R22
R23
ADS931/SO
+5V
+5V
U2
15
14
U
X7	V3O VEE
X6	
X5	
X4	c
ХЭ	e A
X2	X
XI	FN
xo	GND
7
C26-
3
9_
10
22U
S3
Si
so
74HC4051
Deciphering Schematics
215
Chapter 8
(continue...)
Arbitrary Waveform Generator Specifications:
•	iMS/s
	8 - о it resolution (XMEGa is capable of 10 bits, out 8 bits are useo currently)
	256-byte long buffer
	Predefined waveforms: Sme Square, Tnangie, Exponential Noise
	Maximum output voltage: ±3.5V
deciphering Steps
Deciphering mixed-signal or hybr.d circuits will require leverag.ng on wnat you ve learned in
chapters 4 and 6 when interpreting digital and analog designs, respectively. One important
principle in making sense of any circuit is to first familiarize with the elements present in the
design, especially the uncommon or unknown components. You can t confidently decipher
something you have no idea about.220
Let s list down the items found on this single sheet schematic:
*	ATXMEGA32A4 microuontroliei (ui)
•	128x128 LCD display (U6)
•	ADS931/SO ADC (U4)
•	74HC4051 8-to-1 multiplexer (U2)
•	Power converters MC33375D (U5), TPS60403 (U7) and LP2985IM5 (UI 3)
	MIC4832 EL lamp driver (bl 2)
	EVEKE2 rotary encoders (ROTI, ROT2)
	Tactile switches (Kl -K7)
	Op-amps AD8039 (U8) and 0PA2889 (U3)
	Miscellaneous diodes ano transistors
The Xminilab-B piovioes an additional source of informat.cn that is often overlooked—its
functional specifications. When deciphering a schematic diagram, it is helpful to look at the
accompanying product specifications, if it is available. Besides giving you hints on the overall
design pu'pose it also clues you in on specific functionalities,221 ano enables you to link up
related clusters or components.
220 The exceptions are black-box devices such as customized components (ASICs, hybrid JCs) and parts that are
unmarked or without crucial information i.e., datasheets. Even so, it may be possible to deduce what functions
they pert oi m through association with the other known components connected to these devices a process which
I coined backward annotation that is covered in my book. Manual PCb RE: The Essentials.
221 After ail, deciphering schematics is all about understanding a circuit design s functionality.
216
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
The Cure Component
A test equipment this simple with so many functionalities relies very much on the power of a
peripheral-rich processor—an AIXMEGA32A4 microcontroller (UI).
Block diagram of the ATXMEGA32A4
Deciphering Schematics
217
Chapter 8
We have seen the pinout ot this MCU in the previous chapter and know that it is a 44- pin quad
flat package. What's impiessive though, is its arsenal of resources.
•	In-system programmable Flash with read-while-write capability
	Internal EEPROM and SRAM
•	Four-channel DMA controller
	Eight-channel event system222
•	Programmable multi-level interrupt controller
	34 general purpose I/O lines
	16-bit reai-time counter (RTC;
	Five flexible 16 - bit timer/counters with compare modes and PWM
	Five uSarts
•	Two two-wire serial interfaces (TWIs)
	Two serial penphetal interfaces tSPIs)
•	AES and DES crypto engine
	One 12-channel. 12 - bit ADC with differential input and programmable gain
	One 2-cbannel 12-bit DAC
	Two analog comparators with winoow mode
	A programmable watchdog timer with separate internal oscillator
	Accurate internal oscillators with PEL and prescaler
	Programmable brown-out detection223
	Program ano debug interface (PDI)224
i won’t delve into the intricacies of how to configure or program all of the above resources;
interested readers can download the manual and application notes to find out more. I will
nighnglit the necessary features that are linked to the portion of tne schematic which we are
deciphering. Still, having a general idea oi this MCU will help you understand and appreciate
what goes into the des gn o1 this product.225
Bear that ,n mind as we piogress along.
222 The evert system is a set of features for inter penpneral communication which enables the possibility for a
change of state in one peripheral to automatically trigger actions in one or more peripherals. It is a simple but
powerful system that allows for autonomous control of peripherals without any use of interrupts, CPU or DMA
resources.
223 Most mooern microcontrollers have built-in brown-out detection iBOD) circuit which monitors supply voltage
level during operation A BOD circuit is nothing more than a comparator which compares supply voltage to a fixed
trigger level. There are two main aspects to a BOD function—hardware and software. The former resets the
MCu ano keeps it on noia until the power supply returns to normal operating range to ensure tne MCU work
correctly; tne latter is an interrupt based functionality that upon detection of railing operating voltage allows the
software to take care of critical components such as saving vital information to non volatile memory before
resetting the MCU.
224 The A1XMEGAS2A4 is supported by a full suite of program development tools including C compilers, macro
assemblers, program debugger/simulators, programmers, and evaluation kits.
225 It’s also an effective way to learn how a compact, well thougn-out product is designed.
218
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
Power Components
By now it should be second nature for you to deciohei circuits beginning with the power and
ground references.226
K7IN
R38
KT
P'ffi
;R37 '<*
100K
04
1N4148
I t
1N4148
R10
IK
t®RX130
R36
1u0K
ЩЗ-------
IN IIU|3
i IN/ОРГ	.
, BYP "
A GND
LP29&5IM5
02
V[N
J.C17 _ C32
220	11'
+1 5V
ПО
— 2
C34
VIN US
1 IN
GND
GND
5V
3
7~
0U1 ,
GND
GND r—
ON/OFF NC —
-C25
MC333/5D
T₽SbO403
U7
IN
CFY+
_C33
T1011
2
~_5
CI6 C7 J." ’
C57
35
3
-'2
C6
icu
The Xminilab-B receives an input ol 6VDC via a power jack (J4) and distributes this primary
source to its three power converters:
	U13 (LP2985IM5-3.5). an ultra low dropout (L30) fixed output regulator that converts
VIN to +3.5V. The BYPASS oin allows for low-noise operation with the use of a bypass
capacitor (C34). Both U13 and U5 are turned on when PwR=l.
	U5 (MC33375D-5.0), a micropower low-dropout voltage regulator tnai converts VIN to
+5V, which is then coupled to—
	U7 (TPS60433), a charge pump voltage nverterthat inverts the +5V to -5V output.227
If you look carefully, there is actually another
voltage converter circuit stashed at the bottom
.eft of the schematic It s a voltage buffer that
outputs a +2V 'eference via a voltage feedback
amplifier U8. We will discuss where this voltage is
used later. The voltage buffer input is derived
from a precision reference D9 which clamps the
+5v to +2.5V which in turn is furl her reduced to
+ 2V by the voltage divider R55 R56.
4 5V
<Rb3
20Г
09
LM4040A
+ 2.5V
IS
“55
T5K
RM
I60K
U8B
AJ8039
-51-fl’
сз9 q-
+5V
C3b
I—II—
v,81U	*
7 4
4C35
1 IL-
22C Any electronic circuit containing active elements will require power to operate. Knowing what kind of power
supplies are present in a design will give you a rough idea what type of components are used.
227 A charge pump is a kind of DC-to-DC convertei that uses capac tors foi energy storage to raise or .ower voltage.
Charge pump circuits aie capable of nigh efficiencies sometimes as nigh as 90-95%.
Deciphering Schematics
219
ChaptHi 8
LCD Display
A standalone test instrument will need to have its own display to convey the measurement
readings. The Xmini:ab-B uses a 128xi28 uCD panel to display the waveforms captured. Since
an LCD display requires a backlight to oe visible, it will need a power source. This is where the
EL iamp driver Ul 2 comes into play:
DHF50OBN
Tnere are two inputs labeled RSw and REL. RSW is connected to R43 (308K) which controls the
switching frequency (120KHz) of Ul2's MOSFET oscillator for optimum regulation, whne REL is
connected to R42 (753K) and controls the EL frequency (480Hz) of Ul 2's H-bridge driver that
drives the LCD backlight. Both are enabled when BKL=1.
Tne switch ng MOSFET will typically turn on for 90% of the switching pei lod During the on-time
energy is stored in inductor LI. When the switching MOSFET turns off, current flowing intc LI
forces the voltage across it to reverse the polarity. The voltage across the L1 rises until d ode
D7 conducts ana clamps tne voltage ar Vsw + VD7. Tne energy in L1 is then discharged into
capacitor C37. The MOSFET will continue to switch on and off until the internal teedbacK voltage
is above the reference voltage, once that happens, the internal comparator turns off the
switching MOS.-ET oscillator.
When tne EL oscillator is enabled, VA and VB switch in opposite slates to achieve a vcs peak-
to-peak AC output signal.
Tne LCD display module U6 (DMF5O08N) is a complicated peripheral device in its own right. It is
basically a dor matrix graohical display module which includes an lCD controller, a display RAM
a cnaracter generator ROM, and drive circuits. It has a parallel interlace design that supports
botn 6800 (E/RW) and 8080 (RD/WR) CPU scnemes, which suits the ATXMEG32A4 MCU s Harvard
architecture very well.
220
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
Port D oi the ATXMEG32A4 is dedicated Ю the LCD module for data transfers and three of its
sort A pins are used as address and data control lines.
R2 and C24 asserts a power-on reset on the LCD module’s RST pm to initialize the unit each
time power is applied. R1 provides contrast aajustment via the VO pin in relation to the back
1 ight intensity control by U12 on the BCKlT! and ECKLT2 inputs.
Tactile Switches
In conventional Mcu-oased designs, you would expect a row-column matrix style keyboard for
user input. The ATXMEG32A4. however, is no ordinary MCU, which is why it uses a weightage
keypress scheme that takes up only one MCU input pin:
+2V
The secret lies in a 12 - Pit ADC that can be connected to any of the Port A pins, in this case it
is PA6. Each tactile switch is associated witn a different value resistor (K1=80K6, K2=40K2,
K3=20K, etc.) such that when depressed, a different voltage level will be detected by the ADC
and then converted by the MCU to determine which switch is activated.
K7 is a separate tactile switch that oerforms two functions—powei on the Xminilac В on first
depress on when tne 6VDC is live, then acts as the menu switch on subsequent momentary
presses.228 When K7 is first pressed, it turned on U13 which converts VIN to +3.5V to power
the MCU, which in turn drive PWR-1 to latch U13 in the ON state ano at the same time enables
Ub to produce +5V followed by U7 which inverts it to -5V. Once all these voltages are up the
whole unit comes alive and is ready for user interaction.
228 I sa} momentary because if K7 is depresseo for two seconds oi longer, it will power down the Xminilab-8.
Deciphering Schematics
221
Chapter 8
In the active mode K7 cycles through the menus while K6 exits from the current menu.229 K1
thru K5 selects the following menu items:
	K1	K2	КЗ	K4	K5
Default	Run/Stop	-	-	-	-
CH1 Menu	On/Off	Invert	Probe XT/XI0	Average Samples	-
Trigger Source	CH1	-	DAC	PB0	PB1
Trigger Type	Forced	Free	Normal	Single	Auto
Cursor Menu	Reference Waveforms	Lock Auto Set	Vertical Cursors	Horizontal Cursors	-
Disolay Menu	Persistent Mode	Line/Dot	Ga.n/Rate Settings	Grid Type	Backlight On/Off
Digital Input	On/Oft	Invert	ТГнск Low	Serial Hex Display	Paral'el Hex Display
Spectrum Analyzer	Apply Algodthm	Hamming Window	Hann Window	Cosine Window	Triangle Window
AWG Controi	Sine	Square	Triangle	Exponential	Toggle Encocer
Rotary Enccders
We briefly talked aoout tnese devices in Chapter 4. The rotary
encodeis used by the Xminilab-B are also mechanical type with
similar characteristics. ROTI and R0T2 are each connected to a
oair oi Port C pms and serve several purposes, depending on
the menu selections:
Default
Channel 1 Menu
Trigger Sou'ce
Trigger I ype
Cursor Menu
Digital Input
Spectrum Analyzer : ROTI
AWG Cont-ol ROTI
. roti - Horizontal position
R0T2 - Sampling rate
ROTI - CH1, position:
ROTI -
: ROT1
ROT1
 ROTI
ROT 2
ROTI
18
|i
PC8
PCI
MCU
12
PC2
-1?- PC3
13
- Trigger delay
- Cursor 1
- Position
- Horizontal position
- Frequency/Offset
ROT2 - CH1 gam
ROT2 - Trigger level
ROT2 - Trigger timeout
ROT2 Cursor 2
ROT2 - Size
ROT2 - Sampling rate
ROT2 - Ampntude/Duty cycle
229 If the current menu is the default menu, K6 exits the MSO application upon depress.
222
HYBRID CIRCUITS
Deciphering Hybrid Circuits
Serial Interface
Next up, we have a serial interface in which the Xmimlab-B communicates with an external
device such as a PC:
MCU
PC7
PC6
This is accomplished using two Port C pins of the MCU which acts as a pair of TX-RX lines. Since
the MCU operates on +3.5V, the receive signal must be conditioned to a compatible logic level
that the MCU can accept. R18 limits the current whne D5 clips off any negative overshoots, ano
QI inverts the RX data before it reacnes PC6.
Conversely, the transmit signal is resumed to a aual-polarity (±5V) logic level compatible to the
RS-232 standard. Q3 inverts the data from PC7 anc drives Q2 which reverts the ГХ signal and
translate tne voltage level at tne same time.230
Analog In and Out
Based on 1he Xmimlab В specifications, we learned that tnere is one analog input channel as
well as one analog output channel. We see from the layout diagram tnat tnere are indeed two
BNC female connectors, one designated as INPUT and tne other OUTPUT. And when we look at
the schematic diagram, there is one BNC jack symbol labeled ANaLOG IN (JI) and another
ANALOG OUT (J2).
Next, we need to relate tiiese two analog connectors to the Xminilab-B functionalities, which
are:
	ANALOG IN Mixed signal osci loscope (MSO) and Spectrum Analyzer (SA)
	ANALOG OUT Arbitrary waveform generator (AWG)
230 In later verbions of theXscope series produced by Gabotonix, the seiial interface is replaced by the USB.
Deciphering Schematics
223
Chapter 8
Mixed Signal Oscilloscope (MSO)
Noticed there's a capacitor C22 connected across tne 8NC jack to ground, if we check the MSO
specifications, it says Input imoedance: 1MQ, 15pF and that’s precisely what It is. The 1MG input
is the sum of R14+R15 (820K+180K).231
Next, oscilloscopes have AC and DC couplings as well as GND for channel reference. This is
provided oy Sww which is a 3-positon switch. In tne DC position, C13 is bypassed and any
signal with DC level will pass through: m the AC position, Cl 3 comes into effect and block any
DC components while allowing the AC access; in the GND position, the input is grounded so the
channel waveform can be adjusted by the OFFSET resistor R33 to calibrate the waveform to 0V
reference to correct any drift overtime.
R6C and Ci9 form a compensation network with R14 and C18 to improve the overall freauency
response of the MSO s analog bandwidth. R14 and R15 also act as a voltage divider to reduce
the input s.gnal amplitude from ±25V (max spec for 1:1 prone) to +4.5V Delore feeding a non-
inverting op-amp U3B operating from a ±5V rail voltages.
231 Why introduce a 1 5pF capacitance to the MSO's input? Like most real world circuits, oscilloscope inputs have
parasitic capacitances. What can be done with a capacitance that can't be eliminated? Well, why not use it in a
clever way with the probe-and-scope combination? Any unknown capacitance that may be caused oy the probe
cable can thus be compensated just like the scopes input capacitance, and in such a way they pose no major
concern for most practical measurement applications.
224
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
The final stage is an inverting op-amp U3A w.th e.gnt fixed gam selection controlled by the MCU
via an analog multiplexer U2. The gain setting is used to magnify small signals as well as for
setter waveform display on the LCD screen, and is set by tactile switch КЗ in the Display Menu
as follows:
Ri-	Value	Magnification RF/(R28+R39)	Transposition r2
R27	3K	0.5	0.25
R26	7K5	1 25	0.625
R25	15K	2 5	1 .25
R24	30K	5	2.5
R20	75K	12 5	6 25
R2I	150K	25	12.5
R22	300K	50	25
R23	750K	125	62.5
Selection is done by the MCU’s Port E pins PE0-PE2.
In addition, U3a's normalized output (±2V) is fea to a signal distribution network with different
voltage range transpositions, one arm to u4 s ADC input (1.5 to 3.5V) and the other arm to the
MCU’s pin PA0 (0 to 2V).
1 5 10 3.5V
+5V	*2V
429	R62
, 10Л R30	R61	l0K
«	-ЛМ,- t-AMr-11 —
d. C27 10K	। fit	C40
I5P	I5P
e to 2v
Voltage transpositions at botn arms
is calculated using Kirchhoff s Law:
(VI + V2) + 2
Thus, at the ADC end,
(5 -	2)	-	2	=	1	5
(5 +	2)	+	2	=	3.5
and at the MCU end,
(2 -	2)	+	2	=	0
(2 +	2)	-	2	=	2
U4 is an 8 bit high-speed pipelined aDC that uses two
separate power supplies, +5V for the analog input and
processing stage, and +3.5V foi the ,ogic output stage.
The converted data bits are fed to tne MCUs Port d whicn
also provioes display information to the LCD module. U4
;s enabled by the MCU’s Pod С pm РС5 (0E) ano clocked
by Port E pin PE3 (CLK).
Deciphering Schematics
225
Chapter 8
Spectrum Analyzer (SA)
While an oscilloscope displays signals in the
time domain, a spectrum analyzer presents
them in the frequency domain. And though
both share the same analog input resources
on the Xminilab-B the converted data from
U4 is processed differently in the MCU using
separate software algorithms. Specifically,
the spectrum analyzer applies a fast Fourier
transformation (FFT) to the converted data
and display the results in one of the following
window formats—Hamming, Hann. Cosine,
or Triangle.
Arbitrary Waveform Generator (AWG)
Tne Xmimlab-B can output standard waveforms just like a function generator with adjustable
frequency amplitude, offset and duty cycle. The MCU uses the Port В pin PB2 that is linked to
its internal DAC which generate tne waveform, then passes it through an inverting op-amp and
finally out througn the anALOC OJT (J2j jack:
J2
ANALOG
OUT 
C31
R6D 8P
---VW
iO0h
U8A
А08ЙЗ?
R59
150k+35v
R51
30011.
RS8
АЛЛ-
150K
MCU PB2
-C4
Tne predefined waveforms of the awC are:232
Sinuso.dal
Square
Triangle Exponential Noise
The waveform is stored in a 256-byte long buffer which is fed to the MCU's DaC via the DMa.
Once the selected waveform parameters are set it will be generated without requiring any CPU
intervention.
232 By modifying the source code, any kind of waveform can be generated on the AWG.
226
HYBRID CIRCUITS
Deciphering Hybrid Circuits
The maximum conversion rate of the internal 8-bit233 DAC is 1Ms/s: this imposes a limit on
tho maximum output frequency of the AvfG function. For example, if the AWG is generating a
sinewave with 25G points, the maximum frequency is 390G.25 Hz; if generating a sinewave with
only 32 points, the maximum frequency is 31.25 KHz.234
The aWG amplifier (U8A) has a cut off frequency of 66KHz. This can be calculated using the
values of R60 and C31 as follows.
fe = 1/(2nRC)
= 1/(2n x 300K x 8P)
’ 1/1.50816E-05
= 66,305.96
r,jgral Inputs
The Xminilab-B affoids two cigital input channels for use as a logic analyzer via the MCU’s Port
В pms PB0-PB1:
Logic voltage is limited to +3.3V by the pan of voltage dividers R52/R12 and R54/R11 at tne J6
header. This may not seein like much but besides allowing serial digital data to be captured,
these two digital channels can also be used as a trigger source, along with tire ANA.OG IN (CHI)
and the internal DAC (AWG output):
	Kl	КЗ	K4	K5
Trigger Source	CHI	DAC	PB0	PB1
233 The internal DAC of the AfXMLbA32U4 is capable of 10 bits but only 8 bits are used in the Xminilatr-B.
234 Waveform frequency is calculated by dividing the DACs conversion rate with the number of points used to
define the waveform. Complex waveforms require more points to achieve oetter resolution and shape but at the
expense of frequency.
Deciphering Schematics
227
ChaptHr 8
Program & Debug Interface (₽DI)235
Provision is made for a program and debug interface (PDI) to the
Xmmilab-B. Tnis is in line with the manufacturer s objective to use
the product as a development board for the ATXMEGA32U4 avr
microcontroller.
The PDI physical interface uses one dedicated pin (DAT) together
with rhe RST pin (which doubles as a CLK pin for the pDI).
Besides programming of Flash, EEPROM, Fuses and Lock Bits, the PDI can be used to access
the on-chip debug ^CD) system ofthe MCU.236
Miscellaneous Parts
We're almost done with deciphering the Xminilab-B All that’s left are some miscellaneous
items to wrap up.
C'ystal Oscillator
The MCU operatesfrem a '6MHz clock frequency provided by
a crystal oscillator Y1 ano two load caoacitors C2 and C3. It
is by no means the oniy option since the MCU has a built-in
clock system that supoorts several clock sources—ooth
integiated and in this case, external.
LED Indicator
Besides indicating tire presence of power, an LED can provide a visual of the
MCU’s act.vities in response to user selection of menu functions as well.237
Since there is no current limiting resistor in series, the LED used must have
a forward voltage of 3.5V to allow direct driving by the MCU port pin.
MCU
Pc4
235 The PDI is an Atmel proprietary protocol for communication between the MCU and Atmel's development tools.
236 The OCD has support for program and data breakpoints, and can debug ar application from C and high level
language source code level, as well as assembler and disassembler level. It has full Non-lntrusive Operation and
no hardware or software resources in the device are used.
237 At least that is my guess since the LED is connected to the MCU's PC4 pin instead of the usual powei point
locat on. it is possible to make the LED blink at different rates since Port C has two Timer-Counters that can be
linked to any of its I/O pins.
228
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
Buzzer
MCU The buzzer BZ1 is a piezo type transducer that provides an audible
BZi Г ,	indication. Upon power up it should sound a beep to announce that the
XminilaL-Б is working, or some audio fault cooes if tnere is a orobiem
in the initialization, much like the PC POST diagnostics.238
Be.ow is a program listing fragment of the test mode whenever the Xminilab В ,s power on or
selected
// TEST MODE
if(testbitfSignals, testing)) {
ph++;
if(testbit(Signals, redraw)) {
clrbit(Signals, redraw);
lcd_goto(0,1); led.putsp(PS'l R("CH1"));
lcd_goto(0,6); led.putsp(PSTB(“CHD"));
lcd_goto(13,6); lcd_putsp(PSTR("AWG">);
lcd_goto(0,14); lcd.puts(txt); // Print Buffer on LCD
lcd_goto(9,15); lcd..putsp(PSfR(*FAC1 DRV"));
// Timer ГСЕИ OC1D: ADC Clock
TCE0.CTRLB - 0x81;	// CCDLN override, Frequency mode
ТСЕИ.ССА - 4;//99;	// ADC clock
TCE0.CTRLA - 0x01;	// Enable Timer, Prescaler: clk/1
}
lcd_clear_giaphics();
ifCphSOxO1) {
ONGRNO
PORTB.OUTTGL = .BV(BUZZER).
}
// Blink on LED at a time
// Test buzzer toe
}
The shaded portion above shows how the LED and buzzer are exercised visibly and audibly.
And that wraps up our discussion on decipnering the Xminilab В We will now look at another
example before concluding tn is chapter
238 Whether it will provide additional audio indications during the Xminilab B's operation, I have no idea.
Deciphering Schematics
229
ChaptHr 8
Deciphering a CD Sound Machine
There is a story and reason to why I’ve decided to include this piece as an additional bonus in
this chapter.
Wnile I was onio the last section ot Chapter 4, my mum notified me that the Philips CD Sound
machine unit I bought ner a couple of years ago is no longei working. I went over to her place
and did some preliminary checks:
	Power cable is OK
•	Fuse on the motherboard is intact
	Power selector switch (АС/battery) is in the ngnt pos.tion
	Mains filter is neither shorted nor opened
	Operating voltage is present afte' the rectifier stage
The Sound machine is simply not making any sound, so I took it back for a more thorough
check. 0f course, I could do a reverse engineer on the motherboard but reckoned that it would
not be worth my time and effort.239 After all, it is a dated piece of electronic gadget and even
if I do manage to find the faulty components, there s no telling if there is still available parts
to buy for replacement.
Tnen, an idea struck me. Why not use it as an extra teaching material toi this chapter? I did a
search online and found its service manual. Tne two-page schematic diagram is not exactly
ideal but I decided to reproduce tnem as is. Below are the panel controls associated with tne
illustiations overleaf. Schematic diagrams follow suit.
Panel Controls ---------------------------
(j) VOLUME - adjusts volume level
(i) SHUFFLE plays all tracks tn random order
(5) REPEAT - repeats a track/CD program/
entire CD
C*’ ► II - starts or pause CD playback
►и -selectsthenext/previoustrack
- searches forwands/backwards (press and
hold the button) with.n the current track
 - stops CD playback
- erases □ CD program
@ PROG - programs tracks arid reviews
(£1 LIFTTO OPEN - opens/closes the CDdoor
(tj TUNING - tunes to radio stations
(s) Display - shows the CD functions
(?) Source selector CD, FM MW, OFF
-	sheets CD or radio source of sound
-	power off switch
© Telescopic antenna improves ПМ reception
ti JBB - rums the bass enhancement on/off
239 My mum used it to listen to her favorite Chinese radio station while cooking or to get updates on local news.
The CD function was never use at all. Since these days you can get a good portable radio with good enough
speakers for $20 or less online, it does not make sense to repair.
230
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
Top View
Front View
Philips AZ102S Panel Controls
Deciphering Schematics
231
Chaptsi 8
CIRCUIT DIAGRAM - MAINBOARD
CD & DISPLAV SECTION
FOR SANYO DA11
1С1ЭЗ	*?/s/t/w	RH/12/13/14
MM1669AH	NC	YES
Э25ВО	YES	uc
PUH SEL(6pin)		RIBS	R1S7
SANYODAU	MW 9K	33K	100K
	AU I0K	33K	22 К
232
HYBRID CIRCUITS
Deciphering Hybrid Circuits
Fucntion	FUN CT-A	FUMCT-H
AUX	H	H
CD	H	L
TUNER	L	H
Sheet 1 of 2
Deciphering Schematics
233
ChaptRi 8
' a 2111
234
HYBRID CIRCUITS
Deciphering Hybrid Circuits
>и-1оиГ
CIRCUIT DIAGRAM - MAINBOARD
TUNER 4 POWER SECTION
Sheet 2 of 2
Deciphering Schematics
23b
Chapter 8
Don't worry it you can’t make out the details of tne circuit elements. My intention is to let you
have a feel of what some commercial duality schematic diagrams look like, so you know what
challenges you may be up against when deciphering them.
When you first look at this two sneer schematics, the subtitles on each sheet snould catch
your attention:
* Sheet 1 contains the CD & Display control circuitries
 Sheet 2 contains the Tuner & Power circuitries
This should give you some idea on the circuit functionalities involved in each sheet as you set
cut to decipher them. So where snould you start9 As usual—
Follow the Power
Any electronic device requires power to operate, so that should be the most obvious place to
start deciphering.
Tne power plug indicated 120Vac bur here in Singapore we use 220Vac Anyway Philips would
have the correct version for the country of import, so it s not a real issue. What we’re interested
is the voltage at the secondary winding ot tne transformer. If we google the part El-41, we will
discover that it is a 220V to 12V step-down, so even though the schematic did not indicate the
secondary voltage, it’s not hard to figure out.
What we would expect after the full-wave bridge rectifier D101 -0104 is a 12Vdc, filtered by the
electrolytic capacitor Cl 8/, then fed to the mainboard. I denoted it as v+ for reference. If the
A102S is ope-ated from a battery source, then v+ would oe 9Vdc instead. Power select switch
SWI02 in the battery compartment, though, is preset for AC power operation. I need to digress
a little here. V+ is fed directly to the VCC pin of IC104 (Ul CS227) which is a low frequency power
amplifier that operates from a Wide supply voltage between 5-12V. This confirms that both
12Vdc (mains) and 9vdc (battery) are acceptable values for v+.
236
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
It's All About Connections
There’s definitely a truth in this statement.240 As one would expect, the mainboard contains a
number of connectors that interface to the various sub-section of the AZ102S sound system.
These are l.sted below with their pin-signal designations and functions:
CON102			CON103					CON104					CON105				I I I I I I I I I I I	J103A	
PIN	SIGNAL		PIN		SIGNAL			PIN			SIGNAL		PIN		SIGNAL			PIN	SIGNAL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16	VC VCC E D A В C F GND LD VR PD FC+ TR-i- 1R- FC-		1 2 3 4 5 6		SF+ SP- SL+ SL- FM+ FM-			1 2 3 4 5			GND CD+8V R-O'JT A-GND L-OuT		1 2 3 4 5		CD L-CH A-GND CD R-CH CD+8V GND			1 2 3 4 5	GND R-CH NC NC L-CH
								CD POWER & AUDIO OUT*									I I	AUX IN	
			MOTOR DRIVE					CN50I					CN103				I I I I I I I I I I I	J103B	
		I 1						PIN			SIGNAL		PIN		SIGNAL			PIN	SIGNAL
								1 2 3 4 5			AM/FM TU-LOUT TU-ROUT TU-VCC GND		1 2 3 4 5		AM/FM TU-LOUT TU-ROUT TU-VCC GND			6 7 8 9 10 11	NC V+ Q110.1 V+ Q504.2 NC
			CON111																
			PIN		SIGNAL														
			1 2		FREQ-IN GND					AM/FM POWER i TUNFR OUT							I I		
										CNI0I				CON101			I	POWER IN	
SANYO DA11			EXTFRNAI Clock							PIN		SIGNAL		PIN		SIGNAl	I I I I I		
1 1 1										1 2		V+ GND		1 2		V+ GND			
1 1										PRIMARY POWER SOURCE							I		
										CON110				CON 401				CON112:CON402	
CON107				CONI 08						PIN		SIGNAL		FIN		SIGNAu		PIN	SIGNAL
PIN	SJGNAL			PIN		SIGNAL				1 2		GND KEY-aD		1 2		GND KEY		1 2 3 4 5 6 7 8 9	LCD01 LCD02 LCD03 LCD04 LCD05 LCD06 LCD07 LCD08 LCD09
1 2 3 4 5 6 7 8	HO^D 3 9V MUTE POWER-ON +3.9V GND +3.3V FUNC A FUNC В			1 2 3 4 5 6 7 8		+3.3V FUNC A FUNC В HOLD 3.9V MUTE POWER-ON +3.9V GND													
										PANEL KEY INTERFACE									
										CON106				CN102					
										PIN		SIGNAL		PIN		SIGNAL			
										1 2 3		SP-R GND SP-L		1 2 3		SP-R GND SP-L			
POWER, MUTE & FUNCTIONS*										AUDIO OUT TO SDEAKER								LCD DRIVE	
240 In the business world, it’s not what you know but who you know that matters. In the academic world, it’s not
who you know but who knows you that gets your work recognized.
Deciphering Schematics
237
Chapter 8
There are seven pairs of connectors that are mated together (enclosed in dotted lines), as
follows:
" CON107 COM 08
" CONI 04: COM 05
	CN501 :CN103
" СМ01 -СОМ01
	CON110:CON401
	CON106:CN102
•	CON112:CON402
POWER. MUTE & FUNCTIONS
CD DOWER & AUDIO OUT
AM/FM POWER & TUNER OUT
PRIMARY POWER SOURCE
PANEL KEY INTERFACE
AUDIO OUT TO SPEAKER
LCD DRIVE
Notice tnat two of tnem have signals that do not seem to match pm-for-pin (asterisk marks).
CONI 04 COM 05 are reversed. Tnat s how their signals are assigned buttney are connected in
reversed order: 1-5, 2-4 3-3, 4-2 and 5-1 241 CONI07:CONI08 is even more pizarre as the
signals are all over the place without an ordedy sequence. It’s likely that both are solder points
and not really connectors so the wires are Tree to cnsscross from the power section to the
display controller section.242
Now that we have the connections straightened out, we can. see more clearly how signals are
linked to various parts in the schematic diagrams.
Source Selector Swtch
Next, I want to draw your attention to the following quadruple-ganged 4- position slider switch
SW103:
241 It’s bad engineering practice by the designer, probably an oversight bu* too late to remedy.
242 Perhaps there’s some power layout considerations involved nere, or the designer simpiy wanted an easier
way of routing the POB tracKS which a strict pin oi dering might not nave afforded him.
238
HYBRID CIRCUITS
Deciphering Hybrid Circuits
If you google its part number (SS-44D04-G4) you II discover that it’s a 4-pole 4 throw (4P4T)
slider switch, each position representing CD-FM-MW-OFF. From the drawing, we know that MW
is actually AM.243
4P4T Slider Switch
1-of-4 Po'e Elements
SW-A	sw-c
12	3	45	67	8	9 10
T '	i i	t=i	r=:i i	□	czj
[........ К................I
iz5i	i—i	i—i	r4-1	t='	i^i
11 12	13 I4 15	16 17	18	19 20
SW-B	SW-D
Switch-Slider Orientation
"fracing the connector signals to the Sw103 switch pins, we see the following configurations for
each switch position:
			SW103-A	SW103-B	SW103-C	SW103-D
POSITION	1	CD	CD L-CH	CD R-CH	V+	FUNC A
POSITION	2	FM	TU-LOUT	TU-ROUT	TU-VCC	FUNC В
POSITION	3	AM				
POSITION	4	OFF	NO CONNECTION			
By now you should've figured why I started out with the primary powei input, digressed to the
connectors and then zoomed in on SW103, don t you? It's not called the source selector switch
in the user manual (item 9 on tne Panel Controls; for nothing, it's like the signpost at a cross
junction that tells you which road leads wnere.
243 MW stands for medium wave and is the part of the medium frequency (MF) radio band used mainly for AM
radio broadcasting.
Deciphering Schematics
239
Chapter 8
OFF Position
With AC power applied and the source selector switch in the OFF position, V-r from the power
source will only be supplied to the power amplifier circuit comprising IC104 and its associated
elements, as shown below:
SW103-C
This portion of power-related circuit has oeen slightly modified to
make it easier to read and decipher (compared to the original with
crisscrossed and awkward wirings).
>
DlUd
POWER ON=0 (OFF) due
to Q506 oemg turned
on. grounding DI 07.
<174
bZ30<
Transistor states.
Q506 On
Q111 OFF
Q110 OFF
QI 09 OFF
Q102 X
Q103 X
Q106 X
QI 07 X
X - DON'T Care
01'0
U90D
(V»>
Only tne power pins VCC and
VCC2 of power amplifier I с 104
are included for discussion.
Wnen SW103-C is in the OFF position, the sound machine is tumen OFF.
240
HYBRID CIRCUITS
Deciphering Hybrid Circuits
AM and FM Positions
There are two positions in the raoio mode, one in the AM waveband and the other in the FM. As
mentioned earlier selecting either AM or FM, SW103-A and SW103-B will route the tuner’s stereo
outputs TU-LOUT and TU-ROUT to the power amplifier circuit, respectively. SW103-D will route
+3.3V to the hybrid controller (1C102)244 to select FUNC B.245
SAI 03-B though, is wha1 we’re interested in. Whether in the AM or FM position, Shi 03-B will
rum or ihe Tuner Circuit by supplying V+ via the TU-VCc pm of CN501 enroute CN103. The only
distinction lies .n the AM/FM input to the Tuner Circuit. Wnen SW103-B is in the AM position, Q503
will oe turned on by V4 on the AM/FM line and cause Q501 to Turn on as well, feeding a voltage
from Ти-VCC to pin 16 (LPF2) of the AM/FM tuner cnip IC501 Conversely, when SW103-B is in
the FM position, the AM/FM line is open wntch turns bofn Q503 and 0501 off, so pin 16 of IC501
sees an open circuit, condition.246
Q501 (PNP) is a high Side switch that is controlled by Q503 (NPN) using either a DC or logic level
input at its base via tne am/FM line.
244 IC102 (ТС94А29ГАС-01 8| is a single-chip CD processor with an on-chip CMOS LCD driverand a built-in 4-bit
microcontroller (CD-CX).
245 This function is a software routine related to the radio mode of the sound machine and controls the display
of selected radio channel on the 7-segment LCD panel.
246 IC501.16 is the bias terminal for the AM/FM switch circuit that activates the AM function when h.gh. and the
FM function in the open circuit condition. The datasheet provides insightful information on the characteristics
and internal circuitry associated with each pm Readers are encouraged to download and study it.
Deciphering Schematics
241
Chapter 8
Coming back to the power side ot SW103 B, we see that whether in the AM or FM position, V+
will turn on Q111, grounding the base of QI 09 and turning it on so that v+ is applied to VCC2 of
power amplifier 1C104 as well. Thus, the power amplifier circuit is now operational.
swroi-c
Refer to the previous section for the AM/FM and
TH-VCC outputs.
Transistor states
Orua
1H414B
X - DON’T CARE
POWER ON-1 (ON) since Q506
is turned off, ana a positive
voltage is exerted on Df07.
Q11G is related to the CD
power side and is discussed
in the next section.
Q506	OFF	Q102	X
Q111	ON	QI 03	X
QI 10	ON	Q106	X
Q109	ON	Q107	X
(Vt,
КПЯ Ort
47и/К<
Only the power pins VCC and
VCC? of power amplifier IC104
are includea for aiscuss.on
Notice that there is a capacitor Cl 74 across the base-emitter ot Q111. The purpose of Ci 74 is
to protect Ql 11 from bulk current injection (BCI) stemming from a relatively high voitagc of
nearly +12V. derived from the v+ source. This is a crude but effective methoa. Capacitor Cl 67
at the collectoi of Q109 is for filtering the supply (V+) to VCC2 once the transistor is turned on
and conducting.
242
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
CD Position
In the CD position, SW103-B will route V* to power the CD-related circuits. I’ve demarcated the
two groups ot transistors into common’and ’CD-related’tor ease of explanation The common
transistors behaved as per the am and FM positions so there’s no need tor repetition here.
The CD-related transistors are all turned on, though only QI 03 acts as a
switch while the rest are behaving like voltage regulating elements, which
we will discuss their operations now.
---------- >
one 0106
Transistoi states:
Q506
Q111
Q110
QI 09
OFF
Common
ON
ON J
QI 02
QI 03
Q106
QI 07
ON
ON
ON
ON
v+
CO toot)
CD-rclatcd
(v*>
Whether in the CD, AM or FM position, QI 10 is always conducting whenever Q111 is turned on.
V+ is therefore applied to the CD-related circuit whether it's operational or not.
Deciphering Schematics
243
Chapter 8
In the CD position, V+ is applied to turn on Qi 03 and activate the series element transistor Ql 07
and its base voltage regulator QI 02 with a 7.5V zener reference via Z102.
By itself, Q107 would conduct almcsl the whole
Vr through its coilectoi to the CD p'aye' circuit,
which would be way above the required CD +8V
voltage. However, the junction of 3114 ana D112
limits Qi 07s output to the combined average of
voltages present at D114.AN and D112.CA. which
is calculated as follows:
D114 AN = R120/(R116+R120) * V4-
= 33K/(10K+33K) * 12
- 9.21V
D112.CA = VZ102 - VBE (of QI02)247
=7.5-0 63
= 6.87V
Tnus, the junction of Di 14 ano D112 will have a
combined average voltage of
(9.21 + 6.87)/2 = 8.04V
CD -8v is fed to another voltage regulator comprising Q106
and Z101 to proauce a +3.9V output as well as a HOLD VCC
3.9V signal to the CD processor IC 102.
Operation is similar to tnat of tne Q102/Z1O2 pair
mentioned above This series element voltage regulator
has the base of QI06 stabilizea by diode zener Z101, whose
output can be calculated thus:
Qi06.EM = VZ101 VEE (Of0106)247 248
= 4.3 - 0.4
= 3.9V
The +3 9V is used to power the CD processor s logic which runs at +3.3V. Dioae D115 is used to
reuuce the voltage to the desired level and at the same time provide reverse protection for
the voltage regulator. The +3.3V is also fed to SW103-D for function select purpose when it is
in the CD (FUNC A) or AM/FM (F UNC El position.
247 Typical VBE(ON) value given in tne datasheet is 0 63V.
248 Only max,mum VBE(ON) value is given in the datasheet (1V) so a typical value of 0.4 is assumed.
244
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
CD +8V is also ted to a 4-channel motor d11ver i£103 which turns on Q108 to latch the supply
voltage to the rest of the CD section, comprising the single-chip CD processor IC102 ano digital
servo head amplifier IC101
As a side note three cut of the four channels in IC103 are used to drive tne Sony CD player
mechanism, namely the spindle motor (SP+ and SP-), the sied motor (SL+ and SL-), and the
tracking motor (TR+ and TR-).249
Sony DA11 CD player mechanism assembly
249 The spinale motor spins the CD at a speed of between 200-250 rpm depending on the leading position of
the laser head. The sled provides the means by which the optical pickup can be moved across the disc during
normal play or to locate a specific track or piece of data. Basic CD player functions performed by the front-end
electronics include amplification of the photodetector array output, as well as controlling the focus, tracking, and
sp.ndle servo motors.
Deciphering Schematics
24b
Chapter 8
Hgu-e be’Dw illustrates the CD Sound Machine functional block diagram:250
SP SL TP
SANYO DA 11
Tne ability to depict a circuit diagram using a block diagram not only helps you see how the
power and signal flow, but also understand its functionality better ano deciphering it. There is
no need to go into every detail, just the essentials will de.
250 I won t go into the details on how the CD 01600001511 operates. Interested reader can find more information
on this website— https://www.reoairfaa.0rg/sam/cdfao.htm#cdfun
246
HYBRID CIRCUITS
Deciphering Hybr.d Circuits
The sound machine switches to LINE IN mode automatically when an external audio source
is connected to the AUX IN stereo input jack, no matter SW103 is in CD. FM or MW mode.251
One last bit I wot Io like to touch on before ending my discussion is the dynamic bass boost
(DDB) funct.on whicn is performed by the DPDT switch SW101:
251 This feature is useful for the AZ102S to function as a portable loudspeaker for microphone or for amplifying
music from low power devices such as a handphone or laptop.
Deciphering Schematics
247
Chapter 8
When turned on, th.s is supposed to make the music sound better or diff erent.252 If you look
carefully at the circuit, it s actually a filter that compensates for the frequency response of the
human ear.253 * The right channel filter is formed by Rill and C149 while the left channel is
filled in by R114 and C148 In the off position, Cl 48 and Cl 49 are simply shorted out and both
channel filte's cease to function.
As a side note, Vl 01 -a and V101 -B aie a ganged rotary logarithmic potentiometer for volume
adjustment. The MUTE signal, when active (ON), will cause Q101 and Q104 to turn on and cutoff
both channel audios that feed to tne R_IN and L_TN of the power amplifier TCI 04.
And that concludes our decipher ing of the Philips AZ102S CD Sound-Machine.
Eriata:
I did nol cover the tuner circuit which is operated oy the TA2111N, a single chip AM/FM tuner
IC designed for portable and headphone radios. Wnen tne level of details in deciphering a
schematic diagram goes beyond the immediate interconnections ano into chip level, it
becomes too involved and requires analyzingtne emp s internal design, which is not tne
intent ot this book. However, readers are encouraged to download and study the datasheet
at their own time ano pace.
252 The ‘boost is actually ‘loudness’ which Sony gave a nice sounding term—dynamic sound generator.
253 The ear is less sensitive to both the low and high end sound spectrum and its sensitivity varies with the
volume. To compensate for this aberration, a filter is inserted into the audio amplifier with a transfer function
that matenes the inverted ear sensitivity function.
248
HYBRID CIRCUITS
Poiw Oinpplu] Circuit
Powersupplies can generally be classified into linear and switcnmg types.254 Linear regulators
are series or pass element type that operate in tne linear region of the current control element
(power transistor or MOSCET), out due to its lossy nature only down conversion is possible.
Switching regulators, also Known as switched-mode power suppl.es (SMPS). ooerate in the
saturated (ON/OFF) regions of the switching elements and offer a wider possibility of design
topolog es.255
Linear Regjlators	Switching Powe' Supplies
Advantages 	Low output ripple and noise •	Fast transient response 	Low cost 	Easy to design 	Little EMI concerns	Advantages •	High efficiency (70-95%) 	Wide input voltage range 	Low heat dissipation 	High watt/cm2 	Isolation •	Multiple outputs
Disadvantages 	Low efficiency (30-50%) 	Large heat dissipation •	Down conversion only •	Bulky and heavy	Disadvantages 	EMI concerns 	Slow transient response 	Difficult to design 	Higher output ripple and noise
Applications 	Low rippie and noise circuits 	Low input to output voltage 	Stringent regulation 	Fast loading response	Applications 	High efficiency power 	High ambient temperature 	Large input fluctuations 	Space constra.nts 	High output power
254 Power supplies are also called power converters whose primary function is to convert one form of electrical
energy to another, e.g., AC to DC or DC to DC. There can be a single output or multiple outputs, and these can
be fixed or programmable, regulated or unregulatec, local or remotely cont'olled.
255 Appendix E provides a collection of isolated and non-isoiated models for these SMPS 'egjlators.
Deciphering Schematics
249
ChaptHi 9
Linear Power Supplies
Linear power supplies are generally built around three bas'C designs, half-wave, full-wave and
ondge rectifiers. A simplified block diagram with the mam components is shown below:
Tne regulating component can either be a voltage regulator iCfor low-current applications, or
one or more series cutrenl elements where high power is required. Wmle a budge rectifier
may produce similar output like the full-wave rectifier it does not require a bulky center-
tapped transformer and the oeak inverse voltage rating of its djoaes is half that required by
the full-wave rectifier. The transformer utilization factor is much better in the bnoge mctifier
design as well.
Fixed Output
Lineai power supplies are easy to design using three terminal integrated circuits such as tne
78xx senes regulators One common limitation of these IC regulators is their low current rating
which is usually less than 1.5A. but this can be circumvented with a series pass transistor tc
boost the current.
Bridge rectifier with standard current rating
250
HYBRID CIRCUITS
Power Supply Circuits
Variable Output
to build powersupplies with variable outputs, adjustable regulators such as LM317 and LM337
are employed that can provide an output range train 1.25v to 37v. An example of a dual polarity
linear power supply is shown below:
Real-world designs, however, are not that straightforward. Bencntop power supplies such as
the Velleman K720O (see overleaf) come with voltage adjust (coarse and fine) ano current
limiting functions, as weli as overvoltage and overcurrent protection built-in io ensure safety
during operation.
Deciphering Schematics
2Ы
ChaptHi 9
252
HYBRID CIRCUITS
Deciphering Schematics
Velleman K7200 Lab Power Supply
0-30V 0-1OA
Power Supply Circuits
ChaptHi 9
A Deciphering Example
Deciphering a linear power supply is not too difficult, though You need to take note of a few
main components that are present:
	What kind of rectification is it using?
	Is the regulator discrete. integratec or a comaination ol both?
	Is the output adjustable and is there current limiting'’
•	Is any feedback or protection circuit in piace?
Let s discuss the Veileman K720O:
The mams power transformer is a large toroidal type (300VA. 15-0-15V) with two secondary
windings that is configured as a two stage slep-dowr with a slight twist upon initial power
up, only one secondary winding is supplying 15V AC to the bnoge rectifier Bl. When the output
voltage rises above 12V, it is detected by IC1, a 741 op-amp configured as a comparator, via
R1 /R2 which suosequently turns on T1 and energizes relay RY1 to switch in the otner seconoary
winding into action
IC2 ana IC3 are two LM723 voltage regulators. 1C2
is used to set the output voltage. IC3 is responsible
for current limiting. R5 and R23 supplies output
voltage feedback to IC2. R6 compensates for the
voltage drop across T2, R16, T3 and R31. A user set
reference voitage (current limit) is derived from the
1C3 s on-chip reference via RV1/2/3, R18, R27 and
R28. This is compared to the voltage developed
across R37-R40 (located between output ground
and the reference ground). If it exceeds the user set
reference, the erroi voltage produced by 1C3 will be
suff'cient to ton/vara-bias the LED and turn on the
current-limiting transistor that is ntegral to voltage
regulator IC2.
NC
CURRENT
LIMIT
CURRENT
SENSE
I NV
INPUT
NON-INV
INPUT
VPEE
V-
NC
FREQ
COMP
V+ (*)
Vc
Vo
Vz
NC
* V+ UNREGULATED
!NpUf
T2 is the control transistor for ГЗ, a Darlington device wmch provides plenty ol drive current
for the output pass transistors T4-T8,256 which are fed with the filtered DC output from tne
bridge rectifier and reservoir capacitors. R41 Rns are needed to account for the variation in
current gain of the pass transistors.257 D3 protects the power supply from any reverse-polarity
voltages that may be accidentally applied to its output terminals.
256 Tnese pass transistors are TIP3055 in TO-218 package and are mounted on two heatsink flanks.
257 These resistors are not necessarily matched.
254
HYBRID CIRCUITS
Power Supply Circuits
Switched Mode Power Supplies
Switch-mode power supply topologies are more complex and comprise both non-isolated and
solated designs. The difference between a non-isolated and an isolated SMPS lies in the use
of a transformer that isolates the secondary from the mams mout in the latter Non-isolated
models are simpler and smallei in design and operate at a higher efficiency but carry greater
nsks due to the presence of live voltages.
SMPS can be designed to operate with AC and DC inputs tne difference being tne DC input
type does not require a rectifier stage; other than that, both will have an inverter stage, a
voltage converter and an output red ifier stage perse. In the AC input type, the rectifier circuit
s sometimes configured as a voltage doubler.258 This feature allows the SMPS to operate from
either a 115V or 230V mains.
For a simple illustration, let's look at a typical ATX power supply. The basic building block of
this SMPS can be represented as follows:
A proper ATX power supply design will have current limiting and sensing, as well as output
voltage monitoring circuit that are tea back tc the PWM controller IC, such that in tne event of
error or failure, a shutdown will be initiated to prevent catasVophic damage from occurring
258 This is typical of ATX models commonly found in PCs.
Deciphering Schematics
2bb
Chaptei 9
The main components ot en ATX power supply unit can be divided into several stages, each
responsible tor certain functions:
1.	The input rectifier converts the AC input (110/2 30V) into DC after stepdown
2.	A switcher (inverter) then converts the DC voltage from the rectifier into a rugh-
frequency voltage (rectangular pulses), which is then ted to a pulse transformer that
lowers the high-frequency AC voltage to the level requ.red to power the load.
3.	Tne control logic is mainly responsible for monitoring and regulating the powersupply
(output voltage stabilization, short-circuit protection at the output, etc.).
4.	An .ntermediate gam cascade stage serves to amplify the signals from tne PWM
controller chip to drive the power transistors of the switcner circuit (inverter).
5.	Tne output rectifier converts the high-frequency low-voltage of the pulse transformer
to a stabilized and filtered DC output.
We can qumkiy identify the main components of an SMPS by opening up an ATX power supply
module:
266
HYBRID CIRCUITS
Power Supply Circuits
These include:
1.	Mams input filter
2.	Mains voltage inverter
3.	Pulse transformer
4,	Standby voltage transformer
5,	Primary heatsink
6.	Primary power choke
7	Fan speed controller board
8.	Power output cables
9.	Voltage/current monitor
The schematic diagram of an ATX 12V standard259 power supply is shown overleaf. To decipher
an aTX power supply, we neea to refer to tne oasic builamg blocks mentioned earlier. For ease
of reference and clarity, the schematic diagram is annotated with shadowed texts.
AC power is applied via a line filter260 that reduces the high frequency current harmon.csfrom
the mams. Thermistor TH1261 limits initial inrush current into the cower supply upon powering
up. Rectifier bridge BD1 converts the bipolar AC into unipolar pulsating voltage after it receive
a power correction via a PFC choke. Varistors are employed before (VR1) and after (VR2.-VR3)
the rectifier as protection from high voltage surges.
PGi [
GND [
FPO[ 3
PSON[ 4
IS12[ 5
Rl[
NC[ 7
14 ] PGG
13 ] Vod
12 ] VS5
11 ] VS33
10]VS12
9 ] IS33
8 ] IS5
Since an ATx power supply is basically an SMPS designed Io work
witn a computer, it is turned on and off by a signal (PSON> from the
motherboard via opto-coupler PH2, when +5VSB is available once
HV+goes live upon AC power application. At the same time, a power
good (PG) signal is supplied by a □owe'' suooly supervisory chip IC4
(WT7525), to the motherboard to indicate when its DC voltages are
wrtnin specifications, so that the computer system can safely
oower up and boot into its operating system
1
2
6
NC - No internal connector
Output converter is r.onfigureo as a two-switch forward converter. Its primary section contains
fast MCSFET switches 01-Q2 and reset diodes D3-D4. When Q1 and Q2 are turned ON DC-lmk
voltage HV+ gets applied to the primary of transformer T1. This creates positive voltages on
the dotteo sides of all tne secondary windings, winch m turn forward biases output rectifiers
D21-D22 and a short while later D23. QI -Q2 are driven via gate drive complimentary transistors
Q3-Q4 which are In turn controlled by the PWM controller IC3 (UC3843). Primary current is sensed
via resistor R6 which is used for cu-rent mode control and power limit.
259 A new superset of the original ATX specifications witn two enhancements—increased +12V output drive and
an additional 4-pin header connector for this purpose to powe- newei CPUs. The most 'ecent ATX PSU standard
is version 2.53 as of Feoruary 2021.
260 Input line filters are incorporated in most switched mode power supplies to reduce EMI ano other electrical
noises ।RFI) present in the ac lines It is also to comply with government 'egulations and agency standards.
261 It has a negative temperature coefficient such that as it heats up, its resistance decreases which reouces
conduction losses in a steady state mode
Deciphering Schematics
257
Chapter 9
Switching FETs
Eras (activated from Power On' button)
258
HYBRID CIRCUITS
Power Supply Circuits
R53
Status & Control
•—11—»ii
CC54
Deciphering Schematics
259
Chaptei 9
The inductor L2 has three coupleo coils tor +5V, +12V and -12V outputs. The one attached to
the -12V line works in flyoack mode, i.e., it conducts when Q1-Q2 are OFF. The -12V output is
regulatea by a 3-terminal linear regulator LM7912.
Representative Block Diagram
TL431 3-Terminal Shunt Regulator
This ATX power supply uses combined regulation for the +5V and
+12V outputs. Error amplifier is implemented with a TL431 (IC5)
which is a 3-terminal shunt regulator that senses the two outputs
and responds to their combined changes by varying the current
supplied to opto-coupler PH3, which in turn affects the duty cycle of
the PWM controller IC3.262
Cornp[	1	8	' VrEF
VFdok [	2	7	] Vcc
i Sense	3	6	, Output
Rf/Cy [	4	5	Gnu
Tne +3.3V tai. is set by a magnetic amplifier (MagAmp) which compnses a saturable inductor
L6, bipolar traus’stor Q11 diode Di 7, and sundry control circuitry, initial inductance of L6 is
mucn higher than L3. so at the beginning of each switching cycle L8 prevents current from
flowing through D23. As I 8 rnpldly saturates. D23 begins to conduct. The blocking time
depends on the reset current through Qi 1 and DI 7, which in turn is set by shunt regulator IC7.
SottS [ ’
FBf
CS [з
Drain [ <
 ]Gno
7 J Vcc
6 ]NC
5 ] Drain
2
Miscellaneous status and protection functions are implemented with
1C4. An auxiliary flyback converter with power switch Q6 and isolation
transformer Г2 provides +5V standby (+5VSB) and bias (Qb) for control
circuitry. It uses error amplifier IC6 and feedback op1o-coupler PHI to
regulate +5VSB via an SMPS current mode controller IC2.
Transistors Qi 2-Ql 3 and their associated circuitry provides fan speed control via temperature
sensing by means of thermistor TH2.
262 Note tnat since there is only one feedback point, neither output is tightly stabilized.
260
HYBRID CIRCUITS
Power Supply Circuits
Low Dropout (LDO) Regulators263
A low dropout regulator is a linear regulator Wat operates with a very small voltage difference
oetween the regulated output voltage and the unregulated input voltage These regulators
support specific design applications where switching voltage regulators are not the obvious
choice,264 includ.ng:
	Low-noise. high-PSRR265 where signal integrity is paramount
	Withstand high voltage fluctuations to protect mission critical circuitry from transients
ard reverse polarity
	Low-power, tiny footprints to save space and battery lite in portable applications266
•	Provide digital core supplies with iow voltage nigh current requirements
Basic Topology
ап LuO voltage regulator operates in the linear
region which in its integrated form, comprises a
series pass transistor, differential error amplifier,
ano precise voltage refetence. An LDO ieguiates
the output load voltage until its input and output
approach each other at the dropout voltage
which ioeally, should be as low as possible to
minimize power dissipation while maximizing
efficiency.
Additional features in some LDCs include:
	An enaole input tnat allows external control to turn ON/OFF the LDO
	Soft-sta1! tnat limits mrusn current and controls output voltage rise time on power-up
	A bypass pin that allows an external capacitor to reduce reference voltage noise
	An error output that indicates tne output going out of regulation
	Thermal shutdown that turns the LDO OFF when overheating occurs
	Overcurrent protecton tnat limits the output current and power dissipation
263 The term 'low dropout' refers to the difference between the input and output voltages that allows the IC to
regulate the output load voltage.
264 Output voltages from switching regulators are noisy and contain ripples, they are not suitable for noise
sensitive devices. Also, their complex switching control method requires many external support components
compared with I no regulators. This is why circuit designs using DC/DC converters tend to be more complicated
anc. costly using switching regulators.
265 Power Supoly Rejection Ratio (how well a power supply rejects ripples that are injected or generated).
26C Additional features such as short-circuit protection and reverse-current blocking make LDOs the ideal choice
when crucial performance is required within confined spaces.
Deciphering Schematics
261
Chaptei 9
Be'ow are some examples of LDO circuits ta*en from a graphics card.
12V to 5V Conversion with Fuse Protection
3 3V to 2 5V Conversion
262
HYBRID CIRCUITS
Power Supply Circuits
Modern video cards interface with the PCI-Express bus so you cap expect that they would use
the two primary voltages. +12V (PEXt 2V) and +3 3V (PEX3V3), which come from the PC power
supply. Display PCBs these days seldom or don't use the standard *-5V power for their digital
chips. At that kind of processing speed, the operating voltages would be somewhere in the
sub-2 5V range or lower, pernaps even 1 ,sv Even so, interfacing to the real world via the DVI
•nterfaces will still requ.re the +5V voltage, which is what we would see in tne +12V to t5V
conversion using a 7305 regulator.
The CPU and DDR memories on a video card primarily depend on the +1.8V low voltage high
current power to operate. A normal regulator can supply limited current, so instead a series
PowerTrench™ MOSFET (FDC637AN) is used. To stabilize the output voltage. Q518 is biased by
a low-voltage snunt regulator U505 (SC431L) which hoias the reference voltage at 1.24V ana
together with resistors R642 and R643, achieved the desired +1,8V output thus
Vout = Vref x (1 + RS42/R643)
= 1.25 x И + 442/1000)
= 1 802
Lastly, the + 3.3V to +2.5V conversion is earned out by an AZ2940D-2.5 linear voltage reguiatoi.
This voltage hints at an Nvidia type graphics processor chip (GPU) that provides the bridge to
its proprietary Scalable Link Interface (SLI) for parallel processing.267
EXERCISE.
Study the overleaf schematic alagram268 and see if you can oecipher the various voltage
regulators and the value of their outputs. Pay attention to the auxiliary circuits (power-
on reset, voltage present indicators, etc.)
For a complex board tnat uses multiple voltage sources, it is not surprising that a power
up sequence is employed to ensure prope" and reliable opeiation Go through tne POWER
SEQUENCE note shown on tne bottom left of the schematic diagram and see if you can
tag each voltage order to its actual regulator circuit.
267 Two or more video cards can be connected via this interface tc produce a single output, allowing two to four
CPUs to share the overall workload when rendering real-time 3D computer graphics.
268 Courtesv of Rutherford Appleton Laboratory. Chilton.
Deciphering Schematics
263
ChaptRi 9
264
HYBRID CIRCUITS
Power Supply Circuits
c	Р7-1В-ЛЯ6 f	ТГ797	С. ₽• СНТ	кА л. о. «тчо»	U. f. л. н~н~ли	
в	и-еияив	тсуг»	о. j г«_.яро	v. 1. о. рсяда	V.J. О. РОТСЕЯ	
«*	99~B»-S9C4 I1 - - - - -	ИЯС^ГОЮТ-Зи	V. J. о ячя<	V.J С. ^И1ИИ	
csax	Dnrt	| НЭП ВС.	Sf.	Q-MC	ft»U,	злятцз
«rtra	|© cclrc аам					
OU1H.WOJQ QWLEJOl LCbCGMTOav, CHILIO*. C*CN 0X11 00*.					
РС32С9Р
CIRCUIT
RCRD-OJ' DRICCP -ROCi PRODUCTION
VCLlAGC 4£GU_»TCO3 / LEM
Ai2 ТЕ 0097 -080- -ЙЗ7^
Deciphering Schematics
26b
GWSHQllCg0
Beset NO VAL
Ut - 6.3/12.6 V
Il  300/150 mA
Capacitances:
system I system!
О» -	1Д	13	pF
a 	033	033	pF
<•« •	1.7	1.7	pF
Typical Characteristics	Limiting Values;
U. -	250	V	U*	-	300	V
U, 	-2	V	W.		I	W
I» -	13	mA	к	.	«	mA
S -	1.(5	mW	U.	*	SO	V
Л 	W.5	кП	Я,	«	23	МП
H - 100	Uv- - 180 V
Йм « ISO Ю
Operating Charactenstks
Resistance • oxuplcd ampilier cathode grid bias
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61. Coruiptnenb Oiqrwlflflts
WIRES & SIGNALS
Wire
Unconnected
Connected
Input
Output
SWITCHES
PB(NO)	PB(NC)	SPST
SPOT	DPST
PB Pushbutton
NO Normally Open
NC Normally Close
SPST Single Pole Single Throw
SPDT Single Pole nouble Throw
DPST Double Pole Single Throw
DRDT Double Pole DoubleThiow
OPDT
POWER & SOURCES
AC Supply
DC Supply
Constant CS
Controlled CS
Controlled VS
Deciphering Schematics
2b 1
Appendix A
1-Cell Battery
Earth GND
RESISTORS
Resistor
LDR
Capacitor
CAPACITORS
268
Component Symbols
INDUCTORS & TRANSFORMERS
Centei Tapped
Step-Up Step-Down
TRANSISTORS & MOSFETS
Varactor
ft
Laser
NPN BJT
P.NP BJT Photo Transistor Darlington
Photo Darlington
Deciphering Schematics
269
Appendix A
N-Chan UJf
N-Chan MOSFET
Enhancement
Р-Chan MOSFET
Enhancement
N-Chan MOSFET
Depletion
P Chan MOSTET
Depletion
Р-Chan UJT
N-ChanJFET
P Chan JFET Optocoupler
LOGIC GATES
AND
OR
NAND
NOR
Buffer
Inverter
XOR
XNOR
3-State Buffer
3-State Inverter
FLIP FLOPS & REGISTERS
d q —
CK
D Flip-Flop
270
Component Symbols
MISCELLANEOUS
ADC
CAC
Fuse
Crystal
Opamp
Speaker
Buzzer
Bulb
Lamp
Ohmmeter
Wattmeter
Motor
Generator
Jumper
SPST Relay
SPOT Relay
Antenna
JACKS & PLUGS
Loop Ante
Dipole Ante
Contact IМ/
Contact (F)
Phono Jack
Mic Jack
Phone Plug
Deciphering Sctiematics
271
Appendix A
Phone jacks
VACUUM TUBES
Triode
Pentode
Twin Triode
Cathode Ray Tube
272
to. 11$ DbanoJarol Sqanlnolugir]
The ANSI/TEEE standard represents more than just a set of new shapes for logic gate symbols.
It is a graphical language wnich defines:
•	the logic funct on of a component (and gate, multiplexer, etc.)
	the signal polarities of the connections (active hign or active low), and
	a range of physical chaiaoteristics (edge-triggered or level sensitive inputs, open-
collector ortn-state outputs, etc.)
It is possible to embed one symbol within another to create hierarchical symbols. Detai's of
the definitions and applications of these symbols may be found in the references given at the
end of this appendix. However, a guide to the oasic characteristics of the symbols and their
interpretation will be presented here.
ANSI/IEEE symbols have three primary characteristics:
1.	Outline Shape. Normally, the symbols are rectangular
with components containing n subcircuits or stages
represented oy n rectangles stacked one above the
other Additionally, control circuits which affect the
operation of ail circuit elements are represented by a
common control block wnicn is drawn as a rectangle
with notched corners (see figure).
CLRa —fc	R1		
CLRb —ь	R2		
CLK	> C		
	"I	Г	
Da	1D		Qa Qa
Db —	2D		Qb
Qb
2.	Qualifying Symbols. These symools are used to identity lhe basic function performed
by a component Qualifying symbols for input/output connections can denote special
characteristics associated with specific inputs oi outputs. Lists of the basic qualifying
symbols are given in Tables 8-1 and B-2.
3.	Dependency Notations. They are used to describe functions winch may only affect
some elements witnm a component. For example, in the figure above, the control
inputs identified by the letter R (reset) are followed by a number which denotes the
input/output signals (prefixed by the same number) which are dependent upon them,
fable E-3 shows tne dependency notations defined by the srandard.
Deciphering Sctiernatics
273
Table B-l General Qualifying Symbols
Table Б-2 Qualifying Symbols tor Inouts and Outputs
Appendix В
&	AND function
2:1	OR function (one or more inputs must be active)
=1	XOR function (one and only one inpul must be active)
=	XNOR function
2k	An even number of inputs must be active
2k 4-1	An odd number of inputs must be active
1	The one input must be active (Buffer/inverter)
[>	Enhanced output drive capability (buffer)
r~r~	Element with hysteresis (Schmitt tnggei)
X/Y	Code converter (BCD,7-SEG, etc)
MUX	Multiplexer
DMUX	Demultiplexer
E	Adder
P-Q	Subti actor
CPG	Look ahead carry generator
JT	Multiplier
COMP	Magnitude comparator
ALU	Arithmetic logic unit
_n.	Re.tiiggerahle monostable
1 _n.	Nnn-retriggeiable monostahle (one-shot)
SRCn	n bit shift register
CTRn	n-bit binary counter
CTR DIVn	Counter: cycle length n
ROM	Read-only memory
RAM	Read/write memory
FIFO	First in first -out memory
0	Complex function (eg PLD)
CT = n [—
Logic negation at input external (J produces internal 1
Logic negation at output, internal (I produces external 1
Active-low input. Equivalent to —o| when using positive logic
Active-low output. Equivalent to |o— when using positive logic
Signal flow from right to left
bi-directional signal flow
Dy namic input (edge-triggered)
Non-logic connection
Analog signal connection
Input with hysteresis
NPN open-collector (or equivalent) output-
active low (wire-AND)
As	|— but contains passive pull-up
NPN open-emitter (or equivalent) output:
active high (Wire OR)
As	|— but contains passive pull-down
Tn state output
Enable.
Bistable input signals
Data input to storage element
Set data contents to specined value
Shift right n bits (Direction of arrow reversed tor shift left)
Increment data contents by n (—л signifies decrement)
Binary grouping
Output active if the value of the data contents are as indicated
IEEE Standard Symbology
[able EJ -3 Dependency Notations
G AND (this input is to be ANDed with other signals identified by the same number)
V	OR
N	XOR
EN Enable (enables action of inputs or enables tri-state or open collector outputs)
Z	Interconnection (denotes internal logic	connections)
X	Transmission path
C	Control	(clock	input to	sequential elements)
S	Set (bistable elements)
R	Reset (bistable elements)
M	Mode (operating mode of multifunctional element)
A	Address (memory address selection)
The following examples show how a selection of component types may De represented using
the ANSI/IEEE notation:
From left to right:
(a)	4-input NaND gate
(b)	Dual 2-1 MUX with high enable
(c)	4-bit up/down counter with paiallel lead
(d)	16x8 register file with tn-state outputs
Figure (a) shows a 4-input NaND gate represented by an AND function with an inverteo polarity
cutput.
Figure (b) shows tnatthe component contains two 2-input multiplexers. Tne common control
dIock shows that the enable (EN) and se'ect lines (Gl) are common to both stages. The G1
dependency notation indicates the AND relationship between the control input and the data
inputs is identified by the number 1. The 1 and 1 labels on the data inputs signify that the
Deciphering Schematics
275
Appendix В
corresponding input value will be present at the output when the seiect' input is 0 or 1
respectively.269
Figure (c) shows a 4-bit counter. The numbers in square brackets indicate the weight of each
stage. Pm 5 functions as a reset inout, the label CT 0 indicating that the counter contents are
set to 0 when the input is nigh. The parallel load input (pin 8) is also an active-nigh level
sensitive input signal whicn affects all counter stages prefixed oy the number 3. P ns 6 and 7
represent 'count-up' and 'count-down' inputs respectively. Considering pin 6, we see that it
controls two different functions. Tne upper (abet (2+) represents an edge sensitive increment
operation. The prefix 2 signifies that the operation of the input is dependent upon any signal
which is suffixed by the number 2, and in this case that signal is controlled by the input on pin
7 wnich contains an and dependency. In other words, the counter will increment if there is a
positive edge on pin 6 and pin 7 is high. Similarly, the counter will dec-ement only if there is a
positive transition on pm 7 and pm 6 is hign. The control outputs on pins 9 and 10 are also
dependent upon input values as well as the state of the counter Pin 9 will go high when the
counter contains a value of 15 (CT=15) and pin 6 is low (1). Similarly, the label tor pin 10 (ICT
=0) indicates that it becomes active only when the counter outputs are zero end tne input on
pin 7 is low.
Figure (d) shows a 16x8 RAM device or register tile. Tne identification of address inputs is self-
explanatory, but the labelling of the oata inputs (A, 1D) denotes tnat data is stored at address
A when the control input (Cl) is high. The data eutput lines, containing the vaiue oi address A,
are active when the enable input (EN) is high, otherwise they are high-impedance (tr i-state).
Further Reading
1.	IEEE (1984( Standard Graphic Symbols tor Logic Functions, ANSI/IEEE standard
911984.
2	IEEE (1986i Standard for Logic Circuit Diagrams ANSI/IEEE standard 991-1986
3.	Kampel, Ian. (1985) A Practical introduction to the New Logic Symbols,
Butterworths. 1985.
4.	Mann. F.A. (1986) Explanation of New Logic Symbols, from Texas Instruments
TTL Data Book.
5.	Lacy, E.A. (1989) Complete Guide to Understanding Electronics Diagrams,
Prentice-Hall.
269 Note that only one of the multiplexer blocks is labelled, since any element which is unlabeled is assumeo to
inherit the qualifying symbols and dependencies of the element above.
276
C. Glcbiue anol Разам® Fillers
There are loin basic types of filters, namely, юл pass filter (LPF), high pass filter (HPF), Dana
pass filter (BDF), and band stop filter (B5F) As their names suggest, these filteis operate on
different frequency ranges of a signal that is passed tnrough them, illustrated by the figure
oelow:
Filters are b'oadiy categorized into two groups— active and passive. Active filters require
external power sources to ooerate but passive filters do not. The former is made up of active
and passive components whereas the latter is passive in nature There aie pros and cons to
consider when choosing which type of filters to operate:
•	Passive filters consume power but provide no gain; active filters can provide
amplification
	Passive filters don’t have frequency limitations: active filters are limited by the
frequency response of the active elements.
	Passive filters can withstand large currents, have better stability and are cheaper.
Deciphering Schematics
277
Appendix С
Passive Filters
S'mole RI C Filters
LOW-PASS (RC)	LOW PASS (RL)	HIGH-PASS (RC)	HIGH-PASS (RL)
LOW PASS (RLC)	HIGH-PASS (RLC)	BAND PASS (RLC)	BAND-STOP (RLC)
278
Active anfl Passive Filters
Active Filters
JST ORDER lPF
(UNITY GAIN)
1ST ORDER HPF
(UNITY GAIN)
Deciphering Schematics
279
Appendix С
(continue...)
28D
0. ЗрВЦо ConFigtnra^ions
An operational amplifier or op-amp is a versatile voltage amplifying device that can oe used
witn external feedback components such as resistors and capacitors between its output and
input terminals to form basic configurations such as inverting, non-inverting, voltage follower,
summing, differential, integiator and differentiator type amplifiers.
Upen-Looc DC Amplifiers270
Closed-Loop DC Amplifiers271
Inverting	Non inverting	Voltage Follower
270 Due to large gam, signal distortion and poor stability issues, open-loop op-amp circuits are rarely used except
in applications such as voltage comparators.
271 The term DC amplifier’ does not mean 'direct current amplifier' but ‘direct coupled amplifier’ (gotcha!) which
can be used for ooth DC and AC signals. The frequency response of this type of amplifier is similar to low pass
filter and hence it is also known as low-pass amplifier'.
Deciphering Schematics
281
Appendix D
Offset Nulling
Real-world op-amps are constructed using different types
of elements (bipolar, MOSFET. JFET, etc.) and come in a
variety of packaging (plastic DIP. metal-can iQ-5, etc.).
Some of tnese ICs house two or tour op amps, all sharing
common rail supplies. Examples are tne 741, TL081 and
CA3I40 These op-amps also pioviae an offset nulling
facility that enables the output to oe set to precisely zero
when the input is at zero This is achieved by wiring a 10K
pot to a pair of offset null pins with the slider connected
to the negative supply rail.
Basic Configurations272
Non-inverting AC Amplifier
Analog Adder or Auoio Mixer
Analog Subtractor or Differential Amplifier
272 The versatile op-amp can be used m an almost infinite variety of linear and switching applications. Here we
showcase a small selection of basic op-amp circuits that you can take reference when deciphering real-world
schematics.
282
Пр Amp Configurations
Idea! Integrator
Ideal Differentiator
273 The voltage reference and adjustable voltage supply are examples of applications of the basic voltage follower
or unity-gain non-inverting DC amplifier
274 This circuit is also known as a shunted integrator because of the presence of Rs which eliminates the problem
of op-amp saturation due to DC offset voltage. Sometimes, a resistor is added to the non-inverting input as bias
compensation.
275 An 'deal differentiator has very high gain at high frequencies making it unstable. Compensating components
Rc and Cc are thus necessary to stabilize the circuit.
Deciphering Schematics
283
Appendix D
vout
Negative Clipper276
Negative Clamper277
276 Clippers and clampers are wave-shaping circuits used for modifying a signal. In the case of the Clippers, a
diode is used to clip off a certain portion of the input signal to obtain a desired output waveform.
277 Clamper circuits are used to insert a predetermined DC level the output signal. For this reason, the clamper
is also called a DC inverter. Sometimes, it is desirable to clamp a signal and add a fixed offset, which can be
easily achiever by applying the desired offset level to the non-inverting input of the op-amp.
284
8. Pouuer Suipplu] Topologies
Linear Power Supplies
Full-Wave Rectifier
Bridge Rectifier
Deciphering Schematics
28b
Appendix F
Switch Mode Power Supplies (SMPS)
Switch-mode power supplies are more complex ana comprise botn non-isolated and isolated
designs The difference lies in the latter’s use of a transformer to isolates the secondary from
the mains input. Non-iso.ated models are simpler and smaller in built and operate at a higher
efficiency out carry greater risks aue то the presence ot live voltages.
SMPS (Non-isolated)
------0
DC IN n-	== DC OUT
Buck
ci--------------------------»
DC IN	|«r.
JUL
--Cl
DC OUT
—о
Boost
C)--
DC IN
—о
DC OUT
—о
Buck Boost
Sepic
286
Power Supply Topologies
SMPS (Isolated)

—о
DC OUT
DC IN
.nn
Flyback
Two-Switch Forward
Deciphering Sctiematics
287
Appendix F
(continue...)
DC IN
ж -
o-
Active Clamp Forward
—о
DC OUT
288
Power Supply Topologies
(continue..)
Deciphering Sctiematics
28a
МШТ THS MINOR
NG KENG TIONG is an engineer turned writer with a passion to
share his knowledge and experience oi over 30 years in
electronics in the field of PCB- RE, testing ana repair. He formerly
worked as a Principal Engineer al Singapore Technologies (ST)
Electronics Limited, a subsidiary of ST Engineering. Uoon
graduation from the Singapore Polytechnics, he signed up with
the Republic of Singapore Air Force (RSAF) as an aircraft
technician and worked in the E-2C Hawkeye repair bay,
servicing the aircraft's avionics using automated test systems
(CAT-HID and RADCOMj and in-house test equipment.
Upon inv.tation, he left the RSAF after his first contract ana joined the nome-grown
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to type-equipment (STTE) of similar nature He also has experience in logic simulation
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Through the course of his wo^k, ne encountered many panted circuit boards ana
electronic modules without schematic diagrams or documentation. That stared nim
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